(19) |
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(11) |
EP 1 686 460 A3 |
(12) |
EUROPEAN PATENT APPLICATION |
(88) |
Date of publication A3: |
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05.11.2008 Bulletin 2008/45 |
(43) |
Date of publication A2: |
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02.08.2006 Bulletin 2006/31 |
(22) |
Date of filing: 23.01.2006 |
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(51) |
International Patent Classification (IPC):
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(84) |
Designated Contracting States: |
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AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE
SI SK TR |
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Designated Extension States: |
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AL BA HR MK YU |
(30) |
Priority: |
26.01.2005 US 45822
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(71) |
Applicant: STMicroelectronics, Inc. |
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Carrollton
Texas 75006 (US) |
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(72) |
Inventor: |
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- Dash, Dillip K.
San Diego, CA 92128 (US)
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(74) |
Representative: Style, Kelda Camilla Karen et al |
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Page White & Farrer
Bedford House
John Street London, WC1N 2BF London, WC1N 2BF (GB) |
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(54) |
Method and apparatus for efficient and flexible sequencing of data processing units
extending VLIW architecture |
(57) A very long instruction word processor with sequence control. During each cycle the
processor generates control signals to functional units based on the values in fields
of an instruction. Each instruction may include an iteration count specifying the
number of cycles for which the control signals should be generated based on that instruction.
The instruction set further includes flow control instructions allowing for repetitive
execution of a single instruction, repetitive execution of a block of instructions
or branching within a program. Such a processor is illustrated in connection with
a disk controller for a hard drive of a computer. The flexible sequencing allows a
hard-drive controller to be readily reprogrammed for use in connection with different
types of media or to be dynamically reprogrammed upon detection of a disk read error
to increase the ability of the disk controller to recover data from a disk.