BACKGROUND
[0001] Unless otherwise indicated herein, the approaches described in this section are not
prior art to the claims in this application and are not admitted to be prior art by
inclusion in this section.
[0002] A radiotherapy system includes multiple electronic components that are configured
to control system parameters, for example, axis motion, beam generation, and power
distribution. The electronic components are usually located adjacent to the elements
that they control to minimize the number of cables routed through the radiotherapy
system or the amount of noise picked up that may occur in long cables.
[0003] Such an arrangement (i.e., the electronic components located adjacent to the elements
that they control) becomes an issue when the radiotherapy system is configured to
deliver a relatively high energy radiation (e.g., above 12 MV). At this energy level,
neutrons are generated, and they may interact with the electronic components. Such
interactions may create internal transients that cause bit flips. For microprocessors,
the effect of such bit flips is significant and undesirable.
[0004] In addition, unlike existing systems in other high neutron flux industries (e.g.,
military and aerospace), a radiotherapy system is normally located less than a few
tens of meters from a location having normal neutron levels. Thus, the existing systems
are inadequate to address at least the challenges that are associated with the close
proximity between such a normal flux area (also sometimes referred to as a console
area) and the radiotherapy system. An example of remote access to a radiation therapy
treatment system can be found in
US 2007/0041498.
SUMMARY
[0005] In at least some embodiments of the present disclosure, a remote control system configured
to support communication between a first environment having a first neutron radiation
level and a second environment having a second neutron radiation level includes a
first computing device and a second computing device. The first computing device is
configured to control a treatment system in the first environment. The second computing
device is configured to issue commands in the second environment for the treatment
system. The first computing device is further configured to determine whether to enable
or disable a function supported by the treatment system, determine whether there is
pending time-sensitive data to transmit, and periodically transmit a first radiation
therapy data collected in the first environment and a first interrupt to the second
computing device in a servo loop.
[0006] In at least some other embodiments of the present disclosure, a remote control system
configured to support communication between a first environment having a first neutron
radiation level and a second environment having a second neutron radiation level includes
a first computing device and a second computing device. The first computing device
is configured to control a treatment system in the first environment and the second
computing device is configured to issue commands in the second environment for the
treatment system. The second computing device is further configured to determine whether
to issue a command to the first computing device to enable or disable a first function
supported by the treatment system, determine whether there is pending time-sensitive
data to transmit, and perform a second function in response to a first interrupt asserted
by the first computing device and based on a first radiation therapy data received
from the first computing device.
[0007] The foregoing summary is illustrative only and is not intended to be in any way limiting.
In addition to the illustrative aspects, embodiments, and features described above,
further aspects, embodiments, and features will become apparent by reference to the
drawings and the following detailed description. The invention is defined by the claims
appended.
BRIEF DESCRIPTION OF THE DRAWINGS
[0008]
FIG. 1 is an illustrative remote control system;
FIG. 2 is a block diagram illustrating certain elements of a node carrier board and
a controller board configured for a component of a treatment system;
FIG. 3 is a block diagram illustrating certain elements of a node carrier board and
a controller board configured for another component of a treatment system and the
link to a sub-controller board;
FIGs. 4-5 are flow charts of methods for operating a remote control system from the
perspective of a device including a controller board;
FIGs. 6-7 are flow charts of methods for operating a remote control system from the
perspective of a device including a node carrier board; and
FIG. 8 is a block diagram illustrating one example interrupt flow, all arranged in
accordance with at least some embodiments of the present disclosure.
DETAILED DESCRIPTION
[0009] In the following detailed description, reference is made to the accompanying drawings,
which form a part hereof. In the drawings, similar symbols typically identify similar
components, unless context dictates otherwise. The illustrative embodiments described
in the detailed description, drawings, and claims are not meant to be limiting. Other
embodiments may be utilized, and other changes may be made, without departing from
the spirit or scope of the subject matter presented herein. It will be readily understood
that the aspects of the present disclosure, as generally described herein, and illustrated
in the Figures, can be arranged, substituted, combined, separated, and designed in
a wide variety of different configurations, all of which are explicitly contemplated
herein.
[0010] FIG. 1 is an illustrative embodiment of a remote control system 100 in accordance
with some embodiments of the present disclosure. The remote control system 100 includes
a first computing device 101 coupled to a treatment system 110 and a second computing
device 103. The second computing device 103 may include data processing components,
such as processors (e.g., Embedded Technology eXtended (ETX), microblaze, etc.) and
field-programmable gate arrays (FPGAs), on one or more printed circuit boards (PCBs)
to communicate and/or manage the treatment system 110 via the first computing device
101. Similarly, the first computing device 101 may also include FPGAs, some of which
may be flash-based and less sensitive to neutrons, on one or more PCBs to interact
with one or more components of the treatment system 110. In some embodiments, the
first computing device 101 and the treatment system 110 are located in a first environment
120, and the second computing device 103 is located in a second environment 130. The
first environment 120 has a first neutron radiation level, and the second environment
130 has a second neutron radiation level. In some embodiments, the first neutron radiation
level is significantly higher than the second neutron radiation level, and the first
environment 120 is in close proximity with the second environment 130 (e.g., less
than 25 meters apart).
[0011] Throughout this disclosure, the first environment 120 is also referred to as a treatment
area/room, and the aforementioned PCBs inside the first environment 120 are also referred
to as controller boards or controller PCBs. The second environment 130 is also referred
to as a console area, and the aforementioned PCBs in the second environment 130 are
also referred to as node carrier boards or node PCBs. In some embodiments, a controller
board may host a Mezzanine board to communicate with a node carrier board. A Mezzanine
board usually has a smaller PCB footprint than a controller board.
[0012] The first computing device 101 may be configured to transmit data collected by the
treatment system 110 to the second computing device 103. The data may include radiation
therapy data associated with the treatment system 110, such as, without limitation,
position information, dosage information, and others. In response to the received
data, the second computing device 103 may be configured to issue and send a control
command, such as a motor drive command, a dosage delivery command, or other commands,
for the treatment system 110 to the first computing device 101. The first computing
device 101 may be further configured to control the treatment system 110 according
to the control command received from the second computing device 103.
[0013] In some embodiments, the first computing device 101 is configured to communicate
with the second computing device 103 via a communication link 105. An example link
may include, without limitation, a high speed serial bus. The communication infrastructure
supported by the remote control system 100 provides at least the following capabilities:
multiple Ethernet (or modified Ethernet protocol) links between the node and controller
PCBs, a mirrored data transfer mode that includes time-critical and non-time-critical
data transfer, watchdog, interrupt, interlock, and loop control.
[0014] The first computing device 101 and the second computing device 103 may support at
least two types of data transfer between them based on the priority of the data. Such
data transfer is bidirectional, i.e., from the first computing device 101 to the second
computing device 103 or from the second computing device 103 to the first computing
device 101. For example, non time-sensitive data may be transmitted with a lower priority.
In some embodiments, non time-sensitive data is stored in a set of predetermined registers/ports/memory
areas. The set of predetermined registers/ports/memory areas are looped over repeatedly
so that the data stored therein is being sent repeatedly as well. The data stored
in this set of predetermined registers/ports/memory areas and sent in matter described
above may also be referred to as "refresh data." When a part of the non time-sensitive
data fails to reach its destination because of a transmission error, the part of the
non time-sensitive data may be resent later. Latency exists for the non time-sensitive
data transmission because of the looping approach.
[0015] Time-sensitive data may be transmitted with a higher priority. For example, the address
of a register/port/memory area which stores time-sensitive data may be written in
a first-in, first-out (FIFO) manner. The first computing device 101 and the second
computing device 103 may have their own FIFO buffers and may be configured to monitor
the buffers. If an entry is found in a FIFO buffer at the first computing device 101,
the first computing device 101 is configured to access time-sensitive data from the
register/port pointed by the entry and transmit the time-sensitive data to the second
computing device 103. Similarly, if an entry is found in a FIFO buffer at the second
computing device 103, the second computing device 103 is configured to access time-sensitive
data from the register/port/memory area pointed to by the entry and transmit the time-sensitive
data to the first computing device 101. In the FIFO approach set forth above, time-sensitive
data is transmitted once. In some embodiments, time-sensitive data may be retransmitted
if such time-sensitive data happens to be stored within the range of the set of predetermined
registers/ports/memory area where non time-sensitive data is designated to be stored.
For example, the first computing device 101 and the second computing device 103 may
each include a refresh watchdog, which may be configured to monitor the predetermined
addresses associated with the register/port/memory area. When the predetermined addresses
are not updated in a predetermined amount time, the refresh watchdog times out, and
the block of data stored in this set of predetermined addresses, including non time-sensitive
data and time-sensitive data, may be transmitted (either from the first computing
device 101 to the second computing device 103 or from the second computing device
103 to the first computing device 101).
[0016] In some other embodiments, time-sensitive data may be retransmitted in response to
a retransmission request from its destination if the destination does not receive
expected time-sensitive data in time. For example, the first computing device 101
and the second computing device 103 may each include one or more watchdogs other than
the refresh watchdog discussed above. These watchdogs may be configured to look for
certain expected information, such as, without limititation, interlock data, interrupt,
time-sensitive data, and others, within a specified amount of time. When the watchdog
times out and the expected information is not received, the first computing device
101 or the second computing device 103 may send a retransmission request to the other
side.
[0017] Suppose the first computing device 101 is configured to support a motor controlling
board in a servomechanism (also referred to as a servo). Some example time-sensitive
data may include position information (from the first computing device 101 to the
second computing device 103) and motor drive commands (from the second computing device
103 to the first computing device 101). If the first computing device 101 is configured
to support a dose related board also in a servo, then some example time-sensitive
data may include measured dosage information (from the first computing device 101
to the second computing device 103) and dose delivery commands (from the second computing
device 103 to the first computing device 101).
[0018] In some embodiments, a plurality of independent communication links are established
between the first computing device 101 and the second computing device 103. A first
link may have a mirrored architecture with a second link. With the mirrored architecture,
any of the two sides of a link may be configured to operate on its own resources (e.g.,
memory space, registers, etc.) This architecture may also allow a large amount of
data on both sides of a link to be transmitted bidirectionally, with each side of
the link operating, for much of the data involved, independently. Alternatively, in
a master/slave approach, the second computing device 103 may be the master and may
be configured to control the data transfer to and from the first computing device
101, the slave. When the master requests data from the slave, the master may wait
for two link times for the data to arrive, including the time to send a request to
the slave first and and the time to wait for the data from the slave.
[0019] FIG. 2 is a block diagram illustrating certain elements of a node carrier board 203
and a controller board 201 configured for a component of the treatment system 110
(e.g., the collimator) in accordance with some embodiments of the present disclosure.
In conjunction with FIG. 1, the controller board 201 may reside in the first computing
device 101, and the node carrier board 203 may reside in the second computing device
103. The controller board 201 and the node carrier board are connected to a plurality
of full duplex links, such as links 205. In some embodiments, the links 205 may support
the Ethernet protocol or a modified version of the protocol. The links 205 may also
support mirrored data transfer capability. As shown, the controller board 201 includes
a Mezzanine PCB 207, which includes logic to transmit and receive data to and from
the node carrier board 203. In alternative embodiments, the functionality supported
by the Mezzanine PCB 207 may be implemented in the controller board 201.
[0020] In some embodiments, the controller board 201 includes a flash-based FPGA 209, which
may be less sensitive to neutrons. The flash-based FPGA 209 may be configured to support
triple modular redundancy (TMR), where storage registers in the FPGA may be tripled,
and a voting system may be implemented to utilize the majority of the register states
to generate an output, thereby being resistant to bit-flips. In other words, if any
one of the three sets of register states fails, the other two sets may correct and
mask the fault. The flash-based FPGA 209 may also be configured to support at least
interlock mechanisms (e.g., interlock controller(s) and registers), interrupt mechanisms
(e.g., interrupt controller(s) and registers), watchdog timers, and error detection
and/or correction mechanisms.
[0021] In some embodiments, the node PCB 203 includes two FPGAs, 211 and 213. Each of these
FPGAs, similar to the flash-based FPAG 209, may also be configured to support at least
interlock mechanisms (e.g., interlock controller(s) and registers), interrupt mechanisms
(e.g., interrupt controller(s) and registers), watchdog timers, and error detection
and/or correction mechanisms. Additional details regarding the interlock mechanisms
are further described in conjunction with FIG. 8.
[0022] FIG. 3 is a block diagram illustrating certain elements of a node carrier board 303
and a controller board 301 configured for another component of the treatment system
110 (e.g., the Beam Generation and Monitoring (BGM) component) and the link to a sub-controller
board 305 (e.g., the BGM-Positioning (BGM-POS) component for motor control of axes
needed for generating beams) in accordance with some embodiments of the present disclosure.
In some embodiments, the flash-based FPGAs of the controller board 301 and the sub-controller
board 305 may be configured to support the similar functions as the flash-based FPGA
209 of FIG. 2, and the FPGAs of the node carrier board 303 may be configured to support
the similar function as the FPGAs 211 and 213 of FIG. 2.
[0023] FIGs 4 and 5 are flow charts of methods for operating a remote control system, such
as the remote control system 100, from the perspective of a device including a controller
board in accordance with some embodiments of the present disclosure. Method 400 may
include one or more operations, functions or actions as illustrated by one or more
of blocks 401, 403, 405, 407, 409, 411, 413, and/or 415. Method 500 may include one
or more operations, functions or actions as illustrated by one or more blocks 501,
503, 505, and/or 507. The various blocks may be combined into fewer blocks, divided
into additional blocks, and/or eliminated based upon the desired implementation. As
set forth above, the controller board is configured to transmit information to a node
carrier board and receive a command from the node carrier board.
[0024] FIG. 4 is a flow chart of the method 400 from the transmission perspective of the
device including the controller board, such as the first computing device 101 of FIG.
1, the controller board 201 of FIG. 2, or the controller board 301 of FIG. 3. In conjunction
with FIG. 1, processing for method 400 may begin at block 401, "TIME FOR NEXT PACKET?"
The first computing device 101 is configured to capture data collected by the treatment
system 110, and in some embodiments, is configured to check periodically for this
next packet of collected data. If it is time to transmit the next packet of collected
data, block 401 may be followed by block 403, "TIME-SENSITIVE PACKET READY?", where
the first computing device 101 is configured to analyze the collected data such as
whether the collected data may be time-sensitive. For example, the controller board
in the first computing device 101 may check its FIFO and service the data in the FIFO
as time-sensitive data. If the time-sensitive packet is indeed ready, block 403 may
be followed by block 405, "INTERRUPT READY?" If so, then block 405 may be followed
by block 407, "SEND TIME-SENSITIVE DATA WITH INTERRUPT," or otherwise followed by
block 409, "SEND TIME-SENSITIVE DATA WITHOUT INTERRUPT." In some embodiments, the
first computing device 101 is configured to send such time-sensitive data to the second
computing device 103 with a higher priority.
[0025] If the time-sensitive packet is not ready as determined in block 403, then block
403 may be followed by block 411, "INTERLOCK DATA READY?" If the interlock data is
ready, then block 411 may be followed by block 413, "SEND INTERLOCK DATA." Otherwise,
block 411 may be followed by block 415, "SEND REGULAR REFRESH DATA." In some embodiments,
if the collected data is associated with enabling/disabling a function supported by
the treatment system 110, the first computing device 101 may be configured to assert
an interlock. The interlock data may be associated with time-sensitive data or non
time-sensitive data and may be transmitted along with the collected data to the second
computing device 103 for further processing.
[0026] FIG. 5 is a flow chart of the method 500 from the receiving perspective of the device
including the controller board, such as the first computing device 101 of FIG. 1,
the controller board 201 of FIG. 2, or the controller board 301 of FIG. 3. In conjunction
with FIG. 1, after transmitting the collected data and/or an interrupt to the second
computing device 103, the first computing device 101 is configured to receive a command
from the second computing device 103 in response to the collected data and/or the
interrupt. Based on the received command, the first computing device 101 is configured
to control the treatment system 110 accordingly. The first computing device 101 may
be configured to control the treatment system 110 to perform one or more functions.
The functions of the treatment system 110 may include power, axis movement, radiation
beam configuration, and dosage measurement and delivery.
[0027] After transmitting the collected data and/or an interlock to the second computing
device 103, the first computing device 101 is configured to receive a command from
the second computing device 103 to enable/disable a function of the treatment system
110. Processing for method 500 may begin at block 501, "PACKET RECEIVED?" If packet
is indeed received, block 501 may be followed by block 503, "RE-REQUEST COMMAND?"
If the received command is not a re-request command, then block 503 may be followed
by block 507, "ACCEPT PACKET DATA." For example, based on the received command, the
first computing device 101 may be configured to enable or disable one of the power,
axis movement, and radiation beam configuration functions of the treatment system
110. On other hand, if the received command is a re-request command, then block 503
may be followed by block 505, "SETUP TIME-SENSITIVE TRANSMIT OF REQUESTED DATA," so
that the data being re-requested may be sent as time-sensitive data and assigned a
higher priority.
[0028] To enhance the fault tolerance of the remote control system 100, in some embodiments,
watchdog mechanisms may be employed in the controller board of the first computing
device 101. For instance, one watchdog mechanism for the controller board may be configured
to check whether a command expected to be received from the second computing device
103 is indeed received within a certain amount of time. If the expected command is
somehow not received, then the watchdog times out, and the controller board may be
configured to send a time-sensitive message to the second computing device 103 with
an interrupt to request for a resend of the command.
[0029] FIGs 6 and 7 are flow charts of method for operating a remote control system, such
as the remote control system 100, from the perspective of a device including a node
carrier board in accordance with some embodiments of the present disclosure. Method
600 may include one or more operations, functions or actions as illustrated by one
or more of blocks 601, 603, 605, and/or 607. Method 700 may include one or more operations,
functions or actions as illustrated by one or more blocks 701, 703, 705, 707, 709,
and/or 711. The various blocks may be combined into fewer blocks, divided into additional
blocks, and/or eliminated based upon the desired implementation. As set forth above,
the node carrier board is configured to issue a command to the controller board in
response to the data collected by the node carrier board.
[0030] FIG. 6 is a flow chart of method 600 from the transmission perspective of the device
including the carrier board, such as second computing device 103 of FIG. 1, the node
carrier board 203 of FIG 2, or the node carrier board 303 of FIG. 3. In conjunction
with FIG. 1, processing for method 600 may begin at block 601, "TIME FOR NEXT PACKET?"
In some embodiments, the second computing device 103 may be configured to send commands
to the first computing device 101. When it is time to send the next packet, block
601 may be followed by block 603, "TIME-SENSITIVE PACKET READY?" If the time-sensitive
packet is ready to be sent, then block 603 may be followed by block 605, "SEND TIME-SENSITIVE
DATA," where the data sent to the first computing device 101 is assigned a higher
priority. On the other hand, if the time-sensitive packet is not ready to be sent,
then block 603 may be followed by block 607, "SEND REGULAR REFRESH DATA."
[0031] FIG. 7 is a flow chart of method 700 from the receiving perspective of the device
including the carrier board, such as second computing device 103 of FIG. 1, the node
carrier board 203 of FIG 2, or the node carrier board 303 of FIG. 3. In conjunction
with FIG. 1, processing for method 700 may begin at block 701, "PACKET RECEIVED?"
The second computing device 103 may be configured to receive information from the
first computing device 101. The information may include data collected from the treatment
system 110, an interrupt asserted by the first computing device 101, or an interlock
also asserted by the first computing device 101. If packet is received, then block
701 may be followed by block 703, "INTERLOCK DATA?" If the received data is interlock
data, then block 703 may be followed by block 705, "PRESENT INTERLOCK DATA TO INTERLOCK
CONTROLLER," where the interlock controller of the second computing device 103 may
be configured to process the interlock data. For example, the interlock controller
may overwrite the asserted interlock under one set of settings or issue a command
to enable/disable some functionalities of the treatment system 110 under another set
of settings. In some embodiments, such a command to enable/disable functionalities
of the treatment system 110 may be considered time-sensitive and may be sent with
a high priority.
[0032] If the received data is not interlock data, then block 703 may be followed by block
707, "INTERRUPT ASSERTED IN PACKET?" If an interrupted is asserted in the received
packet, then block 707 may be followed by block 709, "ASSERT INTERRUPT," where an
interrupt may be asserted to a processor supported by the second computing device
103. Otherwise, block 707 may be followed by block 711, "ACCEPT PACKET DATA," where
the second computing device 103, in response to the received and accepted data that
is not associated with the interrupt or the interlock, may be configured to transmit
corresponding data back to the first computing device 101 with a non time-sensitive
approach.
[0033] To enhance the fault tolerance of the remote control system 100, in some embodiments,
watchdog mechanisms may be employed in the node carrier board of the second computing
device 103. For instance, one watchdog mechanism for the node carrier board may be
configured to monitor whether interlock data expected to be received from the first
computing device 101 is indeed received within a certain amount of time. If the watchdog
times out, then a latcher error condition may occur, which may cause the node carrier
board to transition into a safe state.
[0034] For non time-sensitive data transfer between the first computing device 101 and the
second computing device 103, a pre-defined set of registers may be repeatedly looped,
so that even if one packet is lost due to error, the packet may still reach its destination.
The latency may correspond to the size of the data refresh area that the first computing
device 101 and the second computing device 103 are configured to support. In one embodiment,
this data refresh area may be defined by setting the start address and the end address
of a buffer area.
[0035] For time-sensitive data transfer, time-sensitive registers may be memory mapped to
a certain offset. Any register may be selected for time-sensitive data transfer even
if it is outside or inside the data refresh area for the non time-sensitive data transfer.
If there are more than two requestors for time-sensitive data transfer, an arbitration
logic may be utilized.
[0036] FIG. 8 is a block diagram illustrating one example interrupt flow in accordance with
one embodiment of the present disclosure. As shown, interrupt capability may be supported
by a controller board FPGA 801 and a sub-controller board FPGA 803 on a controller
board and a node carrier board FPGA 805 on a node carrier board. Multiple interrupts
may be shared by a mirror 1 controller, a mirror 2 controller, a processor 1, and
a processor 2. The mirror 1 controller and/or the mirror 2 controller may interrupt
the processor 1, the processor 2, and ETX of the node carrier board. Similarly, the
processor 1 or the processor 2 of the node carrier board may interrupt the ETX of
the same node carrier board.
[0037] As shown, interrupts may be transferred to the node carrier board from the controller
board FPGA 801 and the sub-controller board FPGA 803 as numbers. The interrupts may
also be sent during normal packets (e.g., occupying certain bits of the packets).
In some embodiments, limited interrupt information may be sent per packet (e.g., each
packet may contain information associated with one interrupt). Some additional features
of the interrupt capability may include, without limitation, 1) certain interrupt
numbers may be pre-determined to be valid; 2) on the node carrier board, an interrupt
bit corresponding to the interrupt number received may be set; 3) although it is not
a requirement, a time-sensitive data transfer may be initiated and then the interrupt
number may be provided on the read strobe (TX_MIRROR_RD_EN_COMB_OUT) of the critical
cycle (TX_MIRROR_CRITICAL_CYCLE) by the FPGA logic at the same time the data is provided;
4) to address the possibility that interrupts may be missed on the node carrier board,
the processor (e.g., ETX, microblaze, etc.) on the node carrier board may support
a watchdog mechanism for interrupts that are raised from the controller board; 5)
a built-in interrupt timer may be available for use per processor (e.g., microblaze)
in the local register area associated with the processor. Writes of non-zero value
may trigger the timer, cause the timer to count down, and then interrupt the processor;
and 6) interrupt 0 may be raised by either the processor 1 or the processor 2. This
interrupt may be shared with the interrupt timers (e.g., interrupt timer 1 and interrupt
timer 2) associated with the processors, if such timers are enabled.
[0038] In some embodiments, the node board FPGA 805 may be configured to support an interlock
controller (not shown in FIG. 8). In addition to the interlock controller, there may
also be multiple interlock registers having multiple bits of interlock capability.
There may be an override register associated with each of these interlock registers.
Some of the interlock registers may be shared by the mirror 1 controller, mirror 2
controller, processor 1, and processor 2 of FIG. 8. The other interlock registers
may be shared by the processor 1 and processor 2 of the node carrier board.
[0039] These interlock registers may also be programmed to have impact on a motion enable
loop ("MEL"), which enables the moving of any axis which could collide with a patient,
a power enable loop ("PEL"), which enables power required to support system functions,
such as moving axes or beam, a beam enable loop ("BEL"), which enables radiation to
be delivered, or kilo-volt BEL (KVBEL), which also enables radiation to be delivered.
In some embodiments, these loops may correspond to physical current loops that are
routed to most of the boards in a remote control system, such as the remote control
system 100 of FIG. 1. For each loop, current may be sent out from a source and may
be routed through all controller boards and then back to the source. Any controller
board in the path of the loop may be configured to open or close its control switch
in series with the loop. If all the control switches in series with a loop are closed,
then current is allowed to flow and this may enable a function. Conversely, if any
controller board in series with the loop opens its control switch, then current flow
is prevented, and a function may be disabled.
[0040] The loop impact may be configured by the programming of the corresponding interlock
register, such as the ILOCK_CONFIG register. For example, if bit 0 is set in an ILOCK_CONFIG
register, that may be configured for PEL impact. If bit 1 is set in an ILOCK_CONFIG
register, that may be configured for MEL impact. If bit 2 is set in an ILOCK_CONFIG
register, that may be configured for BEL impact. If bit 3 is set in an ILOCK_CONFIG
register, that may be configured for KVBEL impact.
[0041] The interlock controller may be configured to monitor interlock sources and latch
them until the processor of the node carrier board, such as the ETX, clears them.
Any asserted interlock in a loop's register may result in an open loop if interlock
is not overridden. The node carrier board sometimes may override the interlock for
debugging purposes.
[0042] To illustrate, suppose a controller board in the computing device 101 of FIG. 1 senses
that a feedback encoder associated with motion in the treatment system 110 may have
failed. In some embodiments, the controller board may be configured to assert the
interlock that is dedicated to this particular feedback encoder and send the interlock
in a special time-sensitive message to a node carrier board in the computing device
103. The interlock controller of the node carrier board would see the interlock data
(e.g., by inspecting interlock registers) and inspect state information associated
with the PEL, BEL, MEL, and KVBEL (e.g., the configuration bits). Given that this
example is related to motion, the MEL bit would be set. Because the MEL bit is set,
the node carrier board may be configured to send a MEL open control bit to the controller
board, if the node carrier board has not overridden the interlock. Upon receiving
the MEL open control bit, the controller board may be configured to open the MEL loop
and thus disable motion on the treatment system 110 to prevent the failed feedback
encoder from introducing improper motion.
[0043] In some embodiments, the communication control logic in the controller board may
send interlock information from 4 interlock registers over 8 packets. The interlock
information may be sent in the data field while sending time-sensitive packets with
specific address. When an interlock signal is set in the controller board, the common
control logic may increment the two bit interlock counter for that interlock by one
(if previous interlock was already sent to the node carrier board) and wait for the
turn to send interlock packet. The two-bit interlock counter may also help with mirrored
architecture of the link and any missed interlock packet data. If any interlock packet
was discarded due to error, the same information may be sent on the next available
interlock packet.
[0044] The communication control logic may provide an option to specify time between transmissions
of interlock data. The communication control logic may also provide generics for the
controller board to indicate how many of the interlocks are being used. For example,
a value of 0 may mean that interlock data is not sent to the node carrier board (two
interlock packets are not sent). A value of less than 16 (interlock data in lower
16 bits of the register) may result in savings of one interlock packet. Lesser the
number of interlock packets, better bandwidth utilization of the link (the time can
be used for sending other packets).
[0045] On the node carrier board, an interlock may be accepted if the two-bit counter value
is different from existing counter value. Otherwise, no interlock may be raised.
[0046] In some embodiments, the node carrier board FPGA 805 may be configured to support
enable loop control logic, so that all of the aforementioned loops, PEL, BEL, MEL,
and KVBEL, may be controlled by the node carrier board FPGA 805. The loop control
logic may be configured to open the corresponding loop if any of the following conditions
are met subject to the settings of the LOOP_IMPACT register of the other link: a)
corresponding interlock is asserted, b) ETX loop control bit not set, c) processor
1 loop control bit not set, d) processor 2 loop control bit not set, e) communication
error is asserted by Mirror 1 (Link 1), f) communication error is asserted by Mirror
2 (Link 2), g) ETX Watchdog timed-out, h) Processor 1 Watchdog timed-out, and g) Processor
2 Watchdog timed-out.
[0047] On the Controller board, PEL_CTRL, MEL_CTRL, BEL_CTRL and KVBEL_CTRL signals may
be available from the common control logic to control the loops. These signals may
be qualified with error signals on the controller board. The mirror 1 controller and
mirror 2 controller may provide status of the loops back to the common control logic
in the following ports - PEL_STAT, MEL_STAT, BEL_STAT and KVBEL_STAT.
[0048] In some embodiments, multiple watchdog mechanisms may be supported by the controller
board and the node carrier board. Some example watchdog mechanisms supported on the
node carrier board include, without limitation, a Peripheral Component Interconnect
(PCI) watchdog, a processor (e.g., microblaze) watchdog, a node refresh watchdog,
and a node interlock refresh watchdog. The PCI watchdog may be for the ETX of the
node carrier board and may be hit within 22 mS. The microblaze watchdog may be hit
within 1 mS. The node refresh watchdog may be configured to monitor the update times
for the data sent from the controller board to the node carrier board. The address
area to monitor and the timeout value may be programmed through register RX_CHECK_CONFIG.
The node interlock refresh watchdog may be configured to monitor the update times
for interlock data sent from the controller board to the node carrier board.
[0049] Some example watchdog mechanisms supported on the controller board include a controller
refresh watchdog, which may be configured to monitor the update times for the data
sent from the node carrier board to the controller board.
[0050] The foregoing detailed description has set forth various embodiments of the devices
and/or processes via the use of block diagrams, flowcharts, and/or examples. Insofar
as such block diagrams, flowcharts, and/or examples contain one or more functions
and/or operations, it will be understood by those within the art that each function
and/or operation within such block diagrams, flowcharts, or examples can be implemented,
individually and/or collectively, by a wide range of hardware, software, firmware,
or virtually any combination thereof. Those skilled in the art will recognize that
some aspects of the embodiments disclosed herein, in whole or in part, can be equivalently
implemented in integrated circuits, as one or more computer programs running on one
or more computers (e.g., as one or more programs running on one or more computer systems),
as one or more programs running on one or more processors (e.g., as one or more programs
running on one or more microprocessors), as firmware, or as virtually any combination
thereof, and that designing the circuitry and/or writing the code for the software
and or firmware would be well within the skill of one of skill in the art in light
of this disclosure.
[0051] Although the present disclosure has been described with reference to specific exemplary
embodiments, it will be recognized that the disclosure is not limited to the embodiments
described, but can be practiced with modification and alteration within the scope
of the appended claims. Accordingly, the specification and drawings are to be regarded
in an illustrative sense rather than a restrictive sense.
1. A system configured to support communication between
a first environment having a first neutron radiation level and
a second environment having a second neutron radiation level, different from the first
neutron radiation level, comprising:
a first computing device (101) configured to control a treatment system (110) in the
first environment (120); and
a second computing device (103) configured to issue a command in the second environment
(130) for the treatment system (110), wherein
the first computing device (101) is further configured to
determine whether to enable or disable a function supported by the treatment system
(110),
if there is pending time-sensitive data to transmit, transmit the pending time-sensitive
data with a higher priority than non time-sensitive data, and
periodically transmit a first radiation therapy data collected in the first environment
(120) and a first interrupt to the second computing device (103) in a servo loop;
characterized in that the first computing device (101) is further configured to receive a retransmission
request from the second computing device (103) if the second computing device (103)
does not receive an expected information within a particular time.
2. The system of claim 1, wherein the first computing device (101) is further configured
to transmit a second radiation therapy data collected in the first environment (120)
and a first interlock to the second computing device (103).
3. The system of claim 1, wherein the first computing device (101) is further configured
to determine whether to transmit interlock data to the second computing device (103).
4. The system of claim 1, wherein the first computing device (101) is further configured
to place the first radiation therapy data and the first interrupt are in a time sensitive
packet before transmitting the packet.
5. The system of claim 3, wherein the first computing device (101) is further configured
to enable or disable the function based on a control state of an enable loop received
from the second computing device.
6. The system of claim 1, wherein:
the first computing device (101) is further configured to send a time sensitive packet
with an interrupt to request a resend of the command, if the first computing device
(101) fails to receive the command within a predetermined amount of time; and/or
the first computing device (101) is further configured to retrieve the first radiation
therapy data from a first predetermined set of addresses designated to store time
sensitive data.
7. The system of claim 1, wherein the first computing device (101) is further configured
to receive a retransmission request from the second computing device (103) if the
second computing device (103) does not receive the pending time-sensitive data or
the first interrupt within a particular time.
8. A system configured to support communication between
a first environment having a first neutron radiation level and
a second environment having a second neutron radiation level, different from the first
neutron radiation level, comprising:
a first computing device (101) configured to control a treatment system (110) in the
first environment (120); and
a second computing device (103) configured to issue commands in the second environment
(130) for the treatment system (110), wherein
the second computing device (103) is further configured to
determine whether to issue a first command to the first computing device (101) to
enable or disable a first function supported by the treatment system (110),
if there is pending time-sensitive data to transmit, transmit the pending time-sensitive
data with a higher priority than non time-sensitive data, and
perform a function in response to a first interrupt asserted by the first computing
device (101) and based on a radiation therapy data from the first computing device
(101) characterized in that the second computing device (103) is further configured to receive a retransmission
request from the first computing device (101) if the first computing device (101)
does not receive an expected information within a particular time.
9. The system of claim 8, wherein the second computing device (103) is further configured
to determine whether to issue the first command based on whether an interlock data
is received from the first computing device (101) within a predetermined period of
time.
10. The system of claim 9, wherein the second computing device (103) is further configured
to inspect a predetermined register for the interlock data to determine whether the
interlock data is received.
11. The system of claim 8, wherein:
the second computing device (103) is further configured to transition to a safe state
after the second computing device (103) fails to receive the interlock data within
a predetermined period of time; and/or
the second computing device (103) is further configured to retrieve the time-sensitive
data from a first predetermined set of addresses.
12. The system of claim 1 or 8, wherein the first environment (120) is in close proximity
with the second environment (130).
13. The system of claim 1 or 8, wherein a mirrored architecture is supported between the
first computing device (101) and the second computing device (103).
14. The system of claim 13, wherein one of the first and second computing devices (101,
103) is further configured to periodically transmit data stored in a second predetermined
set of addresses designated to store both non time sensitive data and time sensitive
data to the other of the first and second computing devices (101, 103).
15. The system of claim 8, wherein the second computing device (103) is further configured
to receive a retransmission request from the first computing device (101) if the first
computing device (101) does not receive the pending time-sensitive data or the first
interrupt within a particular time.
1. System, das dazu ausgelegt ist, Kommunikation zwischen einer ersten Umgebung mit einem
ersten Neutronenstrahlungspegel und einer zweiten Umgebung mit einem zweiten Neutronenstrahlungspegel,
der sich von dem ersten Neutronenstrahlungspegel unterscheidet, zu unterstützen, umfassend:
eine erste Rechenvorrichtung (101), die dazu ausgelegt ist, ein Behandlungssystem
(110) in der ersten Umgebung (120) zu steuern; und
eine zweite Rechenvorrichtung (103), die dazu ausgelegt ist, einen Befehl in der zweiten
Umgebung (130) für das Behandlungssystem (110) auszugeben, wobei
die erste Rechenvorrichtung (101) ferner dazu ausgelegt ist,
zu bestimmen, ob eine vom Behandlungssystem (110) unterstützte Funktion aktiviert
oder deaktiviert werden soll,
wenn zu übertragende ausstehende zeitkritische Daten vorliegen, die ausstehenden zeitkritischen
Daten mit einer höheren Priorität als nicht zeitkritische Daten zu übertragen und
periodisch in der ersten Umgebung (120) erfasste erste Strahlentherapiedaten und einen
ersten Interrupt an die zweite Rechenvorrichtung (103) in einem Hilfsregelkreis zu
übertragen; dadurch gekennzeichnet, dass
die erste Rechenvorrichtung (101) ferner dazu ausgelegt ist, eine Neuübertragungsanforderung
von der zweiten Rechenvorrichtung (103) zu empfangen, wenn die zweite Rechenvorrichtung
(103) keine erwarteten Informationen innerhalb einer bestimmten Zeit empfängt.
2. System nach Anspruch 1, wobei die erste Rechenvorrichtung (101) ferner dazu ausgelegt
ist, zweite in der ersten Umgebung (120) erfasste Strahlentherapiedaten und einen
ersten Interlock an die zweite Rechenvorrichtung (103) zu übertragen.
3. System nach Anspruch 1, wobei die erste Rechenvorrichtung (101) ferner dazu ausgelegt
ist, zu bestimmen, ob Interlock-Daten an die zweite Rechenvorrichtung (103) übertragen
werden sollen.
4. System nach Anspruch 1, wobei die erste Rechenvorrichtung (101) ferner dazu ausgelegt
ist, die ersten Strahlentherapiedaten und den ersten Interrupt in einem zeitkritischen
Paket vor Übertragen des Pakets zu platzieren.
5. System nach Anspruch 3, wobei die erste Rechenvorrichtung (101) ferner dazu ausgelegt
ist, die Funktion auf Grundlage eines von der zweiten Rechenvorrichtung empfangenen
Steuerungszustands einer Aktivierungsschleife zu aktivieren oder deaktivieren.
6. System nach Anspruch 1, wobei:
die erste Rechenvorrichtung (101) ferner dazu ausgelegt ist, ein zeitkritisches Paket
mit einem Interrupt zu senden, um ein erneutes Senden des Befehls anzufordern, wenn
die erste Rechenvorrichtung (101) den Befehl nicht innerhalb eines vorgegebenen Zeitraums
empfängt; und/oder
die erste Rechenvorrichtung (101) ferner dazu ausgelegt ist, die ersten Strahlentherapiedaten
von einem ersten vorgegebenen Satz von Adressen, der zum Speichern von zeitkritischen
Daten vorgesehen ist, abzurufen.
7. System nach Anspruch 1, wobei die erste Rechenvorrichtung (101) ferner dazu ausgelegt
ist, eine Neuübertragungsanforderung von der zweiten Rechenvorrichtung (103) zu empfangen,
wenn die zweite Rechenvorrichtung (103) die ausstehenden zeitkritischen Daten oder
den ersten Interrupt nicht innerhalb einer bestimmten Zeit empfängt.
8. System, das dazu ausgelegt ist, Kommunikation zwischen einer ersten Umgebung mit einem
ersten Neutronenstrahlungspegel und einer zweiten Umgebung mit einem zweiten Neutronenstrahlungspegel,
der sich von dem ersten Neutronenstrahlungspegel unterscheidet, zu unterstützen, umfassend:
eine erste Rechenvorrichtung (101), die dazu ausgelegt ist, ein Behandlungssystem
(110) in der ersten Umgebung (120) zu steuern; und
eine zweite Rechenvorrichtung (103), die dazu ausgelegt ist, Befehle in der zweiten
Umgebung (130) für das Behandlungssystem (110) auszugeben, wobei
die zweite Rechenvorrichtung (103) ferner dazu ausgelegt ist,
zu bestimmen, ob ein erster Befehl an die erste Rechenvorrichtung (101) ausgegeben
werden soll, um eine erste vom Behandlungssystem (110) unterstützte Funktion zu aktivieren
oder zu deaktivieren,
wenn zu übertragende ausstehende zeitkritische Daten vorliegen, die ausstehenden zeitkritischen
Daten mit einer höheren Priorität als nicht zeitkritische Daten zu übertragen und
eine Funktion in Reaktion auf einen ersten Interrupt, der von der ersten Rechenvorrichtung
(101) gesendet wird, und auf Grundlage von Strahlentherapiedaten von der ersten Rechenvorrichtung
(101) durchzuführen, dadurch gekennzeichnet, dass
die zweite Rechenvorrichtung (103) ferner dazu ausgelegt ist, eine Neuübertragungsanforderung
von der ersten Rechenvorrichtung (101) zu empfangen, wenn die erste Rechenvorrichtung
(101) keine erwarteten Informationen innerhalb einer bestimmten Zeit empfängt.
9. System nach Anspruch 8, wobei die zweite Rechenvorrichtung (103) ferner dazu ausgelegt
ist, auf Grundlage davon, ob Interlock-Daten von der ersten Rechenvorrichtung (101)
innerhalb eines vorgegebenen Zeitraums empfangen werden, zu bestimmen, ob der erste
Befehl ausgegeben werden soll.
10. System nach Anspruch 9, wobei die zweite Rechenvorrichtung (103) ferner dazu ausgelegt
ist, ein vorgegebenes Register auf die Interlock-Daten zu prüfen, um zu bestimmen,
ob die Interlock-Daten empfangen wurden.
11. System nach Anspruch 8, wobei:
die zweite Rechenvorrichtung (103) ferner dazu ausgelegt ist, in einen sicheren Zustand
überzugehen, nachdem die zweite Rechenvorrichtung (103) die Interlock-Daten nicht
innerhalb eines vorgegebenen Zeitraums empfangen hat; und/oder
die zweite Rechenvorrichtung (103) ferner dazu ausgelegt ist, die zeitkritischen Daten
von einem ersten vorgegebenen Satz von Adressen abzurufen.
12. System nach Anspruch 1 oder 8, wobei sich die erste Umgebung (120) in großer Nähe
zu der zweiten Umgebung (130) befindet.
13. System nach Anspruch 1 oder 8, wobei eine gespiegelte Architektur zwischen der ersten
Rechenvorrichtung (101) und der zweiten Rechenvorrichtung (103) unterstützt wird.
14. System nach Anspruch 13, wobei eine aus der ersten und zweiten Rechenvorrichtung (101,
103) ferner dazu ausgelegt ist, periodisch Daten, die in einem zweiten vorgegebenen
Satz von Adressen gespeichert sind, der zum Speichern von sowohl nicht zeitkritischen
Daten als auch zeitkritischen Daten vorgesehen ist, an die andere aus der ersten und
zweiten Rechenvorrichtung (101, 103) zu übertragen.
15. System nach Anspruch 8, wobei die zweite Rechenvorrichtung (103) ferner dazu ausgelegt
ist, eine Neuübertragungsanforderung von der ersten Rechenvorrichtung (101) zu empfangen,
wenn die erste Rechenvorrichtung (101) die ausstehenden zeitkritischen Daten oder
den ersten Interrupt nicht innerhalb einer bestimmten Zeit empfängt.
1. Système conçu pour prendre en charge une communication entre un premier environnement
ayant un premier niveau de rayonnement neutronique et un deuxième environnement ayant
un deuxième niveau de rayonnement neutronique, différent du premier niveau de rayonnement
neutronique, comprenant :
un premier dispositif informatique (101) conçu pour commander un système de traitement
(110) dans le premier environnement (120) ; et
un deuxième dispositif informatique (103) conçu pour émettre une commande dans le
deuxième environnement (130) pour le système de traitement (110), dans lequel le premier
dispositif informatique (101) est en outre conçu pour déterminer s'il faut activer
ou désactiver une fonction prise en charge par le système de traitement (110),
s'il y a des données urgentes en attente à transmettre, transmettre les données urgentes
en attente avec une priorité plus élevée que des données non urgentes, et
transmettre périodiquement une première donnée de radiothérapie recueillie dans le
premier environnement (120) et une première interruption au deuxième dispositif informatique
(103) dans une boucle d'asservissement ;
caractérisé en ce que
le premier dispositif informatique (101) est en outre conçu pour recevoir une demande
de retransmission provenant du deuxième dispositif informatique (103) si le deuxième
dispositif informatique (103) ne reçoit pas une information attendue dans un laps
de temps spécifique.
2. Système selon la revendication 1, dans lequel le premier dispositif informatique (101)
est en outre conçu pour transmettre une deuxième donnée de radiothérapie recueillie
dans le premier environnement (120) et un premier verrouillage au deuxième dispositif
informatique (103).
3. Système selon la revendication 1, dans lequel le premier dispositif informatique (101)
est en outre conçu pour déterminer s'il faut transmettre des données de verrouillage
au deuxième dispositif informatique (103).
4. Système selon la revendication 1, dans lequel le premier dispositif informatique (101)
est en outre conçu pour placer les premières données de radiothérapie et la première
interruption sont dans un paquet urgent avant la transmission du paquet.
5. Système selon la revendication 3, dans lequel le premier dispositif informatique (101)
est en outre conçu pour activer ou désactiver la fonction sur la base d'un état de
commande d'une boucle d'activation reçue depuis le deuxième dispositif informatique.
6. Système selon la revendication 1, dans lequel :
le premier dispositif informatique (101) est en outre conçu pour envoyer un paquet
urgent avec une interruption pour demander un renvoi de la commande, si le premier
dispositif informatique (101) ne reçoit pas la commande dans un laps de temps prédéterminé
; et/ou
le premier dispositif informatique (101) est en outre conçu pour récupérer les premières
données de radiothérapie provenant d'un premier ensemble prédéterminé d'adresses destinées
à stocker des données urgentes.
7. Système selon la revendication 1, dans lequel le premier dispositif informatique (101)
est en outre conçu pour recevoir une demande de retransmission provenant du deuxième
dispositif informatique (103) si le deuxième dispositif informatique (103) ne reçoit
pas les données urgentes en attente ou la première interruption dans un laps de temps
spécifique.
8. Système conçu pour prendre en charge une communication entre un premier environnement
ayant un premier niveau de rayonnement neutronique et un deuxième environnement ayant
un deuxième niveau de rayonnement neutronique, différent du premier niveau de rayonnement
neutronique, comprenant :
un premier dispositif informatique (101) conçu pour commander un système de traitement
(110) dans le premier environnement (120) ; et
un deuxième dispositif informatique (103) conçu pour émettre des commandes dans le
deuxième environnement (130) pour le système de traitement (110), dans lequel le deuxième
dispositif informatique (103) est en outre conçu pour déterminer s'il faut émettre
une première commande vers le premier dispositif informatique (101) pour activer ou
désactiver une première fonction prise en charge par le système de traitement (110),
s'il y a des données urgentes en attente à transmettre, transmettre les données urgentes
en attente avec une priorité plus élevée que des données non urgentes, et
effectuer une fonction en réponse à une première interruption affirmée par le premier
dispositif informatique (101) et sur la base d'une donnée de radiothérapie provenant
du premier dispositif informatique (101) caractérisé en ce que le deuxième dispositif informatique (103) est en outre conçu pour recevoir une demande
de retransmission provenant du premier dispositif informatique (101) si le premier
dispositif informatique (101) ne reçoit pas une information attendue dans un laps
de temps spécifique.
9. Système selon la revendication 8, dans lequel le deuxième dispositif informatique
(103) est en outre conçu pour déterminer s'il faut émettre la première commande en
fonction de si une donnée de verrouillage est reçue depuis le premier dispositif informatique
(101) au cours d'une période de temps prédéterminée.
10. Système selon la revendication 9, dans lequel le deuxième dispositif informatique
(103) est en outre conçu pour inspecter un registre prédéterminé pour que les données
de verrouillage déterminent si les données de verrouillage sont reçues.
11. Système selon la revendication 8, dans lequel :
le deuxième dispositif informatique (103) est en outre conçu pour passer dans un état
sûr après que le deuxième dispositif informatique (103) ne reçoit pas les données
de verrouillage au cours d'une période de temps prédéterminée ; et/ou
le deuxième dispositif informatique (103) est en outre conçu pour récupérer les données
urgentes provenant d'un premier ensemble prédéterminé d'adresses.
12. Système selon la revendication 1 ou 8, dans lequel le premier environnement (120)
est à proximité immédiate du deuxième environnement (130).
13. Système selon la revendication 1 ou 8, dans lequel une architecture en miroir est
prise en charge entre le premier dispositif informatique (101) et le deuxième dispositif
informatique (103).
14. Système selon la revendication 13, dans lequel un des premier et deuxième dispositifs
informatiques (101, 103) est en outre conçu pour transmettre périodiquement des données
stockées dans un deuxième ensemble prédéterminé d'adresses destinées à stocker à la
fois des données non urgentes et des données urgentes à l'autre des premier et deuxième
dispositifs informatiques (101, 103).
15. Système selon la revendication 8, dans lequel le deuxième dispositif informatique
(103) est en outre conçu pour recevoir une demande de retransmission provenant du
premier dispositif informatique (101) si le premier dispositif informatique (101)
ne reçoit pas les données urgentes en attente ou la première interruption dans un
laps de temps spécifique.