|
(11) | EP 1 737 207 B1 |
| (12) | EUROPEAN PATENT SPECIFICATION |
|
|
| (54) |
System for selecting a format for control data in an imaging device System zur Auswahl eines Steuerdatenformats in einer bildgebenden Vorrichtung Système pour sélectionner un format des données de contrôle dans un capteur d'images |
|
|
|||||||||||||||||||||||||||||||
| Note: Within nine months from the publication of the mention of the grant of the European patent, any person may give notice to the European Patent Office of opposition to the European patent granted. Notice of opposition shall be filed in a written reasoned statement. It shall not be deemed to have been filed until the opposition fee has been paid. (Art. 99(1) European Patent Convention). |
[0001] The present disclosure relates to image scanning arrays, as in a digital copier or digital camera.
[0002] Image sensor arrays typically comprise a linear array of photosensors which raster scan an image-bearing document and convert the microscopic image areas viewed by each photosensor to video image signals. Following an integration period, the image signal charges formed on the photosensors are amplified and transferred as analog video signals to a common output line or bus through successively actuated multiplexing transistors.
[0003] For high-performance image sensor arrays, one embodiment includes an array of photosensors of a width comparable to the width of a page being scanned, to permit imaging generally without the use of reductive optics. In order to provide such a "full-width" array, however, relatively large silicon structures must be used to define the large number of photosensors. In one design, an array is made of twenty silicon chips, butted end-to-end, each chip having 248 active photosensors spaced at 400 photosensors per inch. Typically, the chips which are butted to form the array are formed in a silicon wafer, which is then "diced" into a number of chips, which are individually tested and then arranged into a bar shape.
[0004] Japanese patent application laid-open JP 2004/297145 (A) aims at providing a control signal generator which can output desired image data by outputting CCD/CIS control signals and AFE control signals accurately at high speed, and which can be used for both of the CCD and the CIS. A control signal generator for supplying the control signals to a light-receiving device or the AFE has the following characteristics. When a multiplied reference clock is inputted, an identification number is added for every one cycle of the multiplied clock, and the identification number is outputted to a pattern generator. When allotment signals corresponding to the identification number are inputted from the pattern generator, the allotment signals are outputted to the light-receiving device or the AFE.
[0005] A problem arising when chips are installed in an imaging apparatus, such as a digital scanner or digital copier, is that the larger system may use a type of control data format for controlling the chips operation that is different from the type for which the chips were designed.
SUMMARY OF THE INVENTION
[0006] The invention has been made in view of this problem, and an object thereof is to provide a basic chip design that enables control with either type of control data format. This object is solved by the invention as claimed in the independent claim. Advantageous embodiments of the invention are defined by the dependent claims.
[0007] The present disclosure relates to a chip configuration that can be readily adapted for use in a larger system or apparatus, taking into account a given format of control data by which the larger system controls the chips.
[0008] According to one aspect, there is provided an imaging apparatus, comprising at least one controllable subset of photosensors. A first subsystem operates the subset of photosensors according to a first control data format, and second subsystem for operating the subset of photosensors according to a second control data format.
[0009] According to another aspect, there is provided an imaging apparatus comprising at least a first subset of photosensors. A first subsystem operates the first subset of photosensors according to a first control data format, the first control data format including a signal being in a predetermined state for substantially a duration of a desired integration period for the subset of photosensors. A second subsystem operates the first subset of photosensors according to a second control data format, the second control data format including a signal causing the beginning or ending of an integration period of the subset of photosensors. A selector selects one of the first control data format and the second control data format.
Figure 1 is a plan view of a portion of a "full-width-array" input scanner as would be used in office equipment such as a digital copier.
Figure 2 is a plan view of a photosensor chip in isolation.
Figure 3 is a simplified timing diagram showing a typical operation of a chip for one cycle of operation according one type of control data format.
Figure 4 is a simplified timing diagram showing a typical operation of a chip for one cycle of operation according to another type of control data format.
Figure 5 is a simplified block diagram of a control system of a photosensor chip, by which the control data format to operate the chip can be selected.
[0010] Figure 1 is a plan view of a portion of a "full-width-array" input scanner as would be used in office equipment such as a digital copier. A set of photosensor chips, each indicated as 10, is arranged on a circuit board 100. Each chip 10 includes a set of photosensors, as will be described below. Together, the chips 10 on board 100 form one or more linear arrays of photosensors that extend a length comparable to the width of an image-bearing sheet such as S effectively moving in a process direction P. The sheet S can move relative to the board 100 by being placed on a platen (not shown) relative to which the board 100 moves; or the sheet S can be fed through a document handler (not shown). As the sheet S moves past board 100, a series of small areas on the sheet S reflect light (from a source, not shown) into photosensors on the chips 10. The chips 10 receive the reflected light from sheet S and output image signals for subsequent recording and processing.
[0011] Figure 2 shows a photosensor chip 10 in isolation. In this embodiment, each chip 10 includes four linear arrays, or rows, of photosensors, labeled 20M (for monochrome, or white), 20R (for red), 20G (for green) and 20B (for blue). Each array is provided with a translucent filter (not shown) that causes the array to be sensitive to a particular color or range of wavelength. The monochrome array 20M is sensitive to light throughout the visible spectrum, and is useful when scanning images for monochrome-only image data, as would be useful, for example, in a monochrome copier or facsimile machine, or for optical character scanning. The photosensors may also be provided with other types of filters, such as for infrared blocking.
[0012] In the present embodiment, for each "column" (as shown in the Figure) of one photosensor of each type 20M, 20R, 20G, 20B, there is one output line to an output shift register 24. A general description of how multiple photosensors in a column send signals over one line to a shift register is given in prior art. It will be evident that each photosensor of each type 20M, 20R, 20G, 20B in a column will "look at" one small area of an image being recorded, to obtain full color image data about the small area. A description of how the action of multiple photosensors of different colors must be coordinated is given in US Patent 5,519,514. Once a "scanline" of digital image signals is loaded into shift register 24, the image data for that scanline is output from the chip 10, such as through line VOUT.
[0013] When reading out video signals from various subsets of photosensors, each photosensor in a subset undergoes different changes in its "integration state." Briefly, with any of various basic arrangements of photosensor design, when a predetermined charge or potential level is placed on a photosensor, the photosensor enters an "integration period," in which any light falling on the photosensor is used to accumulate a charge on the photosensor. To end the integration period, another predetermined potential is placed on the photosensor. Following the integration period, the accumulated charge, which relates generally to the intensity of light having fallen on the photosensor during the integration period, is transferred off the photosensor in a known manner. As used herein, "changing the integration state" of a photosensor includes any instance in which a potential or charge is placed on or is associated with a photosensor, to begin or end an integration period.
[0014] As can be seen in Figure 2, the controller 26 accepts a set of control lines, generally indicated as 30, each carrying a specific type of signal, from a control system off the chip. In order to control the integration period of a selected subset of photosensors on the chip as it records a series of scanlines, the control data entering on lines 30 must be in a predetermined format. Figures 3 and 4 are comparative, simplified diagrams of typical control data formats for operating subsets of photosensors on a chip over the recording of one or more scanlines.
[0015] One possible type of format for controlling the photosensors is characterized by a signal entering the chip, the signal being in a predetermined state for substantially a duration of a desired integration period for a selected subset of photosensors. For instance, in Figure 3, there is a simplified diagram of how signals φPP, φFG, φPB (entered on one or more lines such as 30) control the integration times of the individual rows of photosensors. The overall operation is described in more detail in, for example, US Patent 5,519,514 mentioned above. In the Figure, the integration period for the red row 20R corresponds to the relevant signal φFR being high on a line 30: when φFR is high, the red row of photosensors 20R undergoes its integration period (in effect, "the shutter is open"), and when φFR is low, integration is not occurring (in effect, "the shutter is closed"). The same principle applies, as can be seen, to other rows and corresponding signals (the operation of the monochrome row 20M is typically optional depending on a desired scanning operation).
[0016] Another possible format for controlling the photosensors includes a signal (such as, but not limited to, a pulse, or a change in state) causing the beginning or ending of the integration period of a subset of photosensors. As an example, which can be seen in the diagram of Figure 4, a chip accepts an integration control signal IC on one of the control lines such as 30. The integration control signal IC causes the photosensors in a selected row or other subset to have a change in integration state. When a subset of photosensors such as row 30R receives an IC signal, the photosensors simply change their integration state from whatever the state happens to be at the time: the salient feature is that the IC signal changes the integration state of a subset of photosensors, as opposed to defining the duration of the integration state, as with the above-described method.
[0017] Also in the method illustrated in Figure 4, the row select signals RS1 and RS0, which can be loaded through other lines 30, represent a two-bit parallel code identifying the subset to change in integration state in response to the next IC signal. The two-bit parallel lines can thus select, over time, one of the four rows of photosensors 20M, 20R, 20G, 20B in the chip of Figure 2, to have its integration state changed with the next IC signal. The pixel clock φs is typically a constantly-running square wave of a predetermined frequency. The method of Figure 4 is described in more detail in a co- pending application.
[0018] When chips 10 are installed in a larger apparatus such as 100 in Figure 1, the larger system (such as a digital scanner or digital copier) may use one or another type of control data format to control the operation of the chips 10. It is desirable to provide chips 10 of a design that enables control with either control data format, so one basic chip design can be installed in machines with either type of control data format.
[0019] Figure 5 is a simplified block diagram of a system within a control system 26 of a chip 10 by which the control data format to operate the chip can be selected. The input lines 30 onto chip 10 branch off to both a "duration" based integration control subsystem 40 and a "change integration state" based integration control subsystem 42: as such, the inputs into subsystem 40 are φFR, φFG, φFB as seen in Figure 3, and the inputs into subsystem 42 are IC, RS0, and RS1 as seen in Figure 4. Regardless of which type of control signals are used in the larger apparatus, these control signals are entered on input lines 30 and, depending on the type, are sent to one or the other subsystem 40 or 42. As used herein, the term "subsystem" shall mean any signal-processing entity, incorporating hardware and/or software, which processes the incoming control signals; and may or may not include, or go beyond, elements in the illustrated embodiment.
[0020] The subsystems 40 and 42 each accept incoming control signals of a given type and in turn output control data for starting and stopping the integration periods in the various subsets of photosensors 20M, 20R, 20G, 20B, as can be seen by the output labels in Figure 5. The conversions of data within each subsystem 40, 42 may be carried out in hardware or software. The converted data from either subsystem 40 or 42 is then multiplexed in a multiplexer 44. The output of multiplexer 44 is signals that directly affect the integration states of the photosensors in each subset. Another input to multiplexer 44 is one or more selection lines, here indicated as Sel_T and Sel_S. These selection lines tell the multiplexer 44 which input (from either subsystem 40 or 42) to use in its output. Sample gating arrangement 46, seen in Figure 5, is representative of the interaction of the various signals for each combination xY of inputs to multiplexer 44. The aspects of the multiplexer 44 responsive to selection lines Sel_T and Sel_S can be considered a example of a "selector" for selecting which type of control data format will be processed by chip 10.
[0021] In a practical operation, chips 10 of a single basic design, particularly including the elements shown in Figure 5, are installed on a board 100 (as shown in Figure 1) that is disposed within a larger apparatus such as a scanner or digital copier. The larger apparatus will use one control data format, either "duration" based or "change integration state" based. By setting the control lines Sel_T and Sel_S of each chip 10, typically (but not necessarily) at the time of construction of the larger apparatus, one can adapt the chips to accept the control data format of the larger apparatus. Chips 10 can thus be installed in a larger system or apparatus using either type of control data format.
[0022] Although Figure 5 shows a common set of input lines 30 going into subsystems 40 and 42, an alternate design could provide two separate sets of input lines, one set for each subsystem 40 and 42; in such an arrangement one subsystem could in effect be "selected" by the larger apparatus being connected only to the lines of the subsystem suitable for the apparatus' control data format.
[0023] Although the present embodiment is directed toward controlling the integration times of different-filtered linear rows of photosensors, the principle can be applied to controlling any kind of subsets of photosensors in an apparatus, such as in a two-dimensional photosensor array as would be found in a digital camera. The different, effectively independently-controllable subsets could be related by color (such as to alter the color balance or other output of the apparatus); or by sub-area within a the linear or two-dimensional array (in case only a portion of the array is desired to be used at a particular time). Photosensors of different selectable subsets could be commingled with each other within the array, such as to enable "low resolution" operation; i.e., in low resolution only an evenly-distributed subset of photosensors in the array would be read out. The overall system can also facilitate an array wherein one subset of photosensors are effectively provided with a longer integration or exposure time than another commingled subset: such an arrangement may be useful in improving the exposure latitude of a digital camera, such as to allow taking a long-exposure picture and a short-exposure picture simultaneously.
at least one chip (10) comprising:
a set of photosensors, including at least one controllable subset of photosensors (20M, 20R, 20G, 20B); and
a controller (26);
said controller (26) comprising:
a first subsystem (40) adapted to accept an incoming control signal according to a first type of control data format and to output control data for starting and stopping the integration periods of the subset of photosensors (20M, 20R, 20G, 20B)according to said first control data format,
wherein said incoming control signal according to the first type of control data format includes a signal (ΦFR, ΦFG, ΦFB) that defines a duration of an integration period of the subset of photosensors (20M, 20R, 20G, 20B), wherein said signal (ΦFR, ΦFG, ΦFB) is in a predetermined state for substantially the duration of the integration period for the subset of photosensors (20M, 20R, 20G, 20B); and
a second subsystem (42), separate from the first subsystem (40), adapted to accept an incoming control signal according to a second type of control data format and to output control data for starting and stopping the integration periods of the subset of photosensors (20M, 20R, 20G, 20B) according to said second control data format,
wherein said incoming control signal according to the second type of control data format includes an integration control signal (IC) and two select signals (RSO, RS1) that cause the beginning or ending of an integration period of the subset of photosensors (20M, 20R, 20G, 20B), wherein the integration control signal (IC) is adapted to change the integration state of a selected subset of photosensors (20M, 20R, 20G, 20B) from its current integration state, and the two select signals (RSO, RS1) are adapted to select the subset of photosensors (20M, 20R, 20G, 20B) to have its integration state changed with the next integration control signal (IC);
a multiplexer (44) adapted to accept the control data output from the first subsystem (40) and the second subsystem (42) and to output a signal that affects the integration state of the subset of photosensors (20M, 20R, 20G, 20B); and
a selector for selecting one of the first and second types of control data format to be used in the output of the multiplexer (44), wherein the selector is operative of the multiplexer (44).
a plurality of chips, each chip including one controllable subset of photosensors (20M, 20R, 20G, 20B) and a controller (26).
mindestens einen Chip (10), umfassend:
einen Satz aus Fotosensoren, der mindestens einen steuerbaren Teilsatz aus Fotosensoren (20M, 20R, 20G, 20B) enthält; und
eine Steuerung (26);
wobei die Steuerung (46) umfasst:
ein erstes Subsystem (40), das dazu eingerichtet ist, ein eingehendes Steuersignal entsprechend einem ersten Typ eines Steuerdatenformats zu akzeptieren und Steuerdaten zum Starten und Stoppen der Integrationsperioden des Teilsatzes aus Fotosensoren (20M, 20R, 20G, 20B) gemäß dem ersten Steuerdatenformat auszugeben,
wobei das eingehende Steuersignal entsprechend dem ersten Typ von Steuerdatenformat ein Signal (ΦFR, ΦFG, ΦFB) enthält, das eine Dauer einer Integrationsperiode des Teilsatzes aus Fotosensoren (20M, 20R, 20G, 20B) definiert, wobei das Signal (ΦFR, ΦFG, ΦFB) in einem vorbestimmten Zustand für im Wesentlichen die Dauer der Integrationsperiode für den Teilsatz aus Fotosensoren (20M, 20R, 20G, 20B) ist; und
ein zweites Subsystem (42) separat von dem ersten Subsystem (40), das dazu eingerichtet ist, ein eingehendes Steuersignal entsprechend einem zweiten Typ eines Steuerdatenformats zu akzeptieren und Steuerdaten zum Starten und Stoppen der Integrationsperioden des Teilsatzes aus Fotosensoren (20M, 20R, 20G, 20B) gemäß dem zweiten Steuerdatenformat auszugeben,
wobei das eingehende Steuersignal gemäß dem zweiten Typ von Steuerdatenformat ein Integrationssteuersignal (IC) und zwei Auswahlsignale (RSO, RS1) enthält, die den Anfang oder das Ende einer Integrationsperiode des Teilsatzes aus Fotosensoren (20M, 20R, 20G, 20B) bewirken, wobei das Integrationssteuersignal (IC) dazu eingerichtet ist, den Integrationsstatus eines ausgewählten Teilsatzes von Fotosensoren (20M, 20R, 20G, 20B) aus seinem aktuellen Integrationszustand zu ändern, und die zwei Auswahlsignale (RSO, RS1) dazu eingerichtet sind, den Teilsatz von Fotosensoren (20M, 20R, 20G, 20B) so zu wählen, dass sich sein Integrationszustand mit dem nächsten Integrationssteuersignal (IC) ändert;
einen Multiplexer (44), der dazu eingerichtet ist, die Steuerdatenausgabe von dem ersten Teilsystem (40) und dem zweiten Teilsystem (42) zu akzeptieren und ein Signal auszugeben, welches sich auf den Integrationsstatus des Teilsatzes von Fotosensoren (20M, 20R, 20G, 20B) auswirkt; und
einen Selektor zum Auswählen von einem aus dem ersten und zweiten Typ von Steuerdatenformat zur Verwendung bei der Ausgabe aus dem Multiplexer (44), wobei der Selektor wirkend für den Multiplexer (44) ist.
eine Vielzahl von Chips, wobei jeder Chip einen Satz aus Fotosensoren umfassend einen steuerbaren Teilsatz aus Fotosensoren (20M, 20R, 20G, 20B) und eine Steuerung (26) umfasst.
eine Vielzahl von Chips, wobei jeder Chip einen steuerbaren Teilsatz aus Fotosensoren (20M, 20R, 20G, 20B) und eine Steuerung (26) umfasst.
au moins une puce (10) comprenant :
un groupe de photocapteurs, comprenant au moins un sous-ensemble contrôlable de photocapteurs (20M, 20R, 20G, 20B) ; et
un contrôleur (26) ;
ledit contrôleur (26) comprenant :
un premier sous-système (40) adapté pour accepter un signal de commande entrant selon un premier type de format de données de commande et pour délivrer des données de commande destinées à démarrer et à arrêter les périodes d'intégration du sous-ensemble de photocapteurs (20M, 20R, 20G, 20B) selon ledit premier format de données de commande,
dans lequel ledit signal de commande entrant selon le premier type de format de données de commande comprend un signal (ΦFR, ΦFG, ΦFB) qui définit une durée d'une période d'intégration du sous-ensemble de photocapteurs (20M, 20R, 20G, 20B), dans lequel ledit signal (ΦFR, ΦFG, ΦFB) se trouve dans un état prédéterminé sensiblement pendant la durée de la période d'intégration pour le sous-ensemble de photocapteurs (20M, 20R, 20G, 20B) ; et
un second sous-système (42), distinct du premier sous-système (40), adapté pour accepter un signal de commande entrant selon un second type de format de données de commande et pour délivrer des données de commande destinées à démarrer et à arrêter les périodes d'intégration du sous-ensemble de photocapteurs (20M, 20R, 20G, 20B) selon ledit second format de données de commande,
dans lequel ledit signal de commande entrant selon le second type de format de données de commande comprend un signal de commande d'intégration (IC) et deux signaux de sélection (RSO, RS1) qui provoquent le début ou la fin d'une période d'intégration du sous-ensemble de photocapteurs (20M, 20R, 20G, 20B), dans lequel le signal de commande d'intégration (IC) est adapté pour changer l'état d'intégration d'un sous-ensemble sélectionné de photocapteurs (20M, 20R, 20G, 20B) par rapport à son état d'intégration actuel, et les deux signaux de sélection (RSO, RS1) sont adaptés pour sélectionner le sous-ensemble de photocapteurs (20M, 20R, 20G, 20B) afin que son état d'intégration soit changé avec le signal de commande d'intégration suivant (IC) ;
un multiplexeur (44) adapté pour accepter les données de commande délivrées par le premier sous-système (40) et le second sous-système (42) et pour délivrer un signal qui affecte l'état d'intégration du sous-ensemble de photocapteurs (20M, 20R, 20G, 20B) ; et
un sélecteur destiné à sélectionner l'un du premier et du second types de format de données de commande à utiliser pour la sortie du multiplexeur (44), dans lequel le sélecteur fonctionne avec le multiplexeur (44).
une pluralité de puces, chaque puce comprenant un ensemble de photocapteurs comprenant un sous-ensemble contrôlable de photocapteurs (20M, 20R, 20G, 20B) et un contrôleur (26).
une pluralité de puces, chaque puce comprenant un sous-ensemble contrôlable de photocapteurs (20M, 20R, 20G, 20B) et un contrôleur (26).
REFERENCES CITED IN THE DESCRIPTION
This list of references cited by the applicant is for the reader's convenience only. It does not form part of the European patent document. Even though great care has been taken in compiling the references, errors or omissions cannot be excluded and the EPO disclaims all liability in this regard.
Patent documents cited in the description