TWO-WAY TO MULTI-WAY LIGHT EMITTING DIODE CONTROL CIRCUITS AND METHODS FOR CONTROLLING LEDS

Abstract

 Two-way to multi-way light emitting diodes (LED) control circuits and methods are provided for controlling LEDs. A two-way circuit comprises an integrated circuit having a first input-output (I/O) pin and a second I/O pin, two lines, two LEDs namely, a first LED and a second LED. A three-way circuit comprises an integrated circuit having three I/O pins (i.e. a first I/O pin, a second I/O pin, a third I/O pin), three lines and six LEDs. A three-way circuit comprises an integrated circuit having four I/O pins (i.e. a first I/O pin, a second I/O pin, a third I/O pin, a fourth I/O pin), four lines and twelve LEDs.

Description

INTRODUCTION

[0001] The present invention generally relates to electronic circuits and more particularly relates to two-way to multi-way light emitting diode (LED) control circuit for controlling electrodeless LEDs.

[0002] At present, decorative/fairy lights, lighting chains or various household appliances having LEDs are becoming increasingly popular. There exists several systems to control a large number of LEDs. One such system to control LEDs uses an integrated circuit (IC), however, a large number of LEDs controlled using an IC is limited in existing circuit arrangements. Another existing system requires a peripheral component chip in order to control output current for achieving a uniform control of the large number of LEDs. However, such existing integrated circuits can only operate an individual lamp system and are dependent on at least one peripheral component chip. Moreover, the usage of the peripheral component chip do not guarantee stability, variable output power and positive and negative electrodeless outputs are difficult to control. Furthermore, such systems are expensive to buy and are complex for the integration. Also, the existing systems are unable to control two or more power systems reliably, and are generally unstable and not resilient. In addition, the existing systems demands higher maintenance without an improvement on the vulnerability front.

[0003] Accordingly, it is desirable to invent a new and novel LED control circuit that is not only cost effective but also seamlessly controls multiple LEDs without using any peripheral component chip. In addition, it is desirable to use only one LED control circuit for controlling a large number of LEDs. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and the background of the invention.

SUMMARY

[0004] A two-way light emitting diode (LED) control circuit is provided for illuminating at least one of a first LED and a second LED. The circuit comprises an integrated circuit (IC) having a first input-output (I/O) pin and a second I/O pin. Each of the first I/O pin and the second I/O pin is configured to operate in one of a low state and a high state. The circuit also comprises a first line connected with the first I/O pin and a second line connected with the second I/O pin. Each of the first LED and the second LED is coupled between the first line and the second line. And, at least one of the first LED and the second LED is illuminated based on a level of the first line and the second line. The level is one of a high level and a low level.

[0005] A method is provided for illuminating at least one of a first LED and a second LED. The method comprising the steps of operating a first input-output (I/O) pin and a second I/O pin of an Integrated Circuit (IC) in one of a low state and a high state and operating a first line and a second line in one of a high level and a low level. Further, the first line is connected with the first I/O pin and the second line is connected with the second I/O pin. The method further comprising the step of illuminating the at least one of the first LED and the second LED coupled between the first line and the second line based on the high level or the low level of the first line and the second line.

BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The present invention will hereinafter be described in conjunction with the following drawing figures, wherein like numerals denote like elements, and

FIG. 1A depicts a two-way LED control circuit in accordance with a first exemplary embodiment of the invention;

FIG. 1B depicts a two-way LED control circuit in accordance with a second exemplary embodiment of the invention;

FIG. 2A depicts a three-way LED control circuit in accordance with a first exemplary embodiment of the invention;

FIG. 2B depicts a three-way LED control circuit in accordance with a second exemplary embodiment of the invention;

FIG. 3 depicts a four-way LED control circuit in accordance with an exemplary embodiment of the invention;

FIG. 4 depicts an exemplary method for illuminating at least one LED using a two-way LED control circuit in accordance with an exemplary embodiment of the invention;

FIG. 5 depicts an exemplary method for illuminating at least one LED using a three-way LED control circuit in accordance with an exemplary embodiment of the invention; and

FIG. 6 depicts an exemplary method for illuminating at least one LED using a four-way LED control circuit in accordance with an exemplary embodiment of the invention.

DETAILED DESCRIPTION

[0007] The following detailed description is merely exemplary in nature and is not intended to limit the invention or the application and uses of the invention. Furthermore, there is no intention to be bound by any theory presented in the preceding background or the following detailed description.

[0008] While at least one exemplary aspect has been presented in the foregoing detailed description of the invention, it should be appreciated that a vast number of variations exist. It should also be appreciated that the exemplary aspect or exemplary aspects are only examples, and are not intended to limit the scope, applicability, or configuration of the invention in any way. Rather, the foregoing detailed description will provide those skilled in the art with a convenient road map for implementing an exemplary aspect of the invention. It being understood that various changes may be made in the function and arrangement of elements described in an exemplary aspect without departing from the scope of the invention as set forth in the appended claims.

[0009] Referring to FIG.1A, a two-way LED control circuit 100A is shown in accordance with a first exemplary embodiment of the invention. The LED control circuit 100A is a two-way positive and negative electrodeless output and working of the LED control circuit 100A for an output of large-current direct-drive chip is explained herein. The LED control circuit 100A comprises, but is not limited to, an integrated circuit (IC) 102, one or more wires/lines W1 and W2, a plurality of electrodeless LEDs i.e. a first LED L1 and a second LED L2. Further, the integrated circuit 102 has a total of seven pins including a first I/O pin IO1, a second I/O pin IO2, a first oscillator pin OSC1, a second oscillator pin OSC2, a voltage pin VDD, a trigger pin TR and a ground pin GND. The first oscillator pin OSC1 and the second oscillator pin OSC2 are coupled to a crystal oscillator for providing a constant frequency output under varying load conditions. The ground pin GND enables the current in the IC to flow to the ground. The voltage pin VDD is coupled to a power supply that provides power to the circuit 100A. The trigger pin TR controls timing of a control cycle of the integrated circuit 102 and is connected to the ground through a push switch S. As depicted, the first I/O pin IO1 is connected directly with the first line W1 and the second I/O pin IO2 is connected directly with the second line W2. The term "directly" used herein means that each of the I/O pins are connected to their respective lines without any presence of additional components like resistors, capacitors or switches in between. It is to be noted here that the first I/O pin IO1 and the second I/O pin 102 can operate in a static state or in an output state. When the push switch S is triggered, the mode of the first I/O pin IO1 and the second I/O pin IO2 will be changed for once. In other words, the mode of the first I/O pin IO1 and the second I/O pin IO2 will change whenever the push switch S is triggered.

[0010] Each of the first LED L1 and the second LED L2 are coupled in between the first line W1 and the second line W2. Also, each of the first LED L1 and the second LED L2 comprises a positive (+ve) terminal and a negative (-ve) terminal. As shown, a positive terminal of the first LED L1 is connected to the second line W2 and a negative terminal of the first LED L1 is connected to the first line W1. Similarly, a positive terminal of the second LED L2 is connected to the first line W1 and a negative terminal of the second LED L2 is connected to the second line W2. It is understood for a person skilled in the art that the LEDs are unidirectional in nature and thus, the current only flows from a positive terminal of an LED to a negative terminal of the LED and restricting flow of current in the opposite direction.

[0011] When the circuit 100A is turned on, the circuit 100A is configured to operate each of the first I/O pin IO1 and the second I/O pin 102 in one of a high state and a low state. Based on the state of the I/O pins, the circuit 100A is configured to operate the lines W1-W2 in one of a high level and a low level and accordingly, the first LED L1 or the second LED L2 is illuminated based on the level the lines W1-W2. The explanation for illuminating each LED will be explained below in greater details.

[0012] In order to illuminate the first LED L1, the integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state and the second I/O pin 102 in the high state. In an event the first I/O pin IO1 is in the low state and the second I/O pin 102 is in the high state, the first line W1 operates in the low level and the second line W2 operates in the high level causing the current to flow from the second I/O pin 102 to the second line W2 and reaches to the first line W1. At this point, voltage V2 across the second line W2 is more than voltage V1 across the first line W1. This voltage difference in voltage between the first line W1 and the second line W2 creates a potential difference across the lines W1 and W2. In an event the first line W1 operates in the low level i.e. lower voltage and the second line W2 operates in the high level i.e. higher voltage, the current flows from the second line W2 to the first line W1 resulting in illumination of the first LED L1.

[0013] In order to illuminate the second LED L2, the integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state and the second I/O pin IO2 in the low state. As a result, the first line W1 operates in the high level and the second line W2 operates in the low level causing the current to flow from the first I/O pin IO1 to the first line W1 and reaches to the second line W2. At this point, voltage V2 across the second line W2 is lesser than voltage V1 across the first line W1. This voltage difference in voltage between the first line W1 and the second line W2 creates a potential difference across the lines W1 and W2. In an event the first line W1 operates in the high level i.e. higher voltage and the second line W2 operates in the low level i.e. lower voltage, the current flows from the first line W1 to the second line W2 resulting in illumination of the second LED L2.

[0014] The present invention also encompasses several other possible combination of states of the first I/O pin IO1 and the second I/O pin IO2 where both of the first LED L1 and the second LED L2 will remain off. For an instance, in an event both of the first I/O pin IO1 and the second I/O pin IO2 are operating in the high state, the none of the first LED L1 and the second LED L2 will be illuminated. In another instance, the first LED L1 and the second LED L2 will be off when the first I/O pin IO1 and the second I/O pin IO2 are operating in the high state and a suspended state, respectively. In yet another example, the first LED L1 and the second LED L2 will be off when both of the first I/O pin IO1 and the second I/O pin IO2 are operating in the low state. In another example, the first LED L1 and the second LED L2 will be off when the first I/O pin IO1 and the second I/O pin 102 are operating in the low state and a suspended state, respectively. In yet another example, the first LED L1 and the second LED L2 will be off when both of the first I/O pin IO1 and the second I/O pin IO2 are operating in the suspended state.

[0015] Referring to FIG. 1B, a two-way LED control circuit 100B is shown in accordance with a second exemplary embodiment of the invention. The two-way LED control circuit 100B is a two-way positive and negative electrodeless output and comprises, but is not limited to, an integrated circuit (IC) 102, one or more wires/lines W1 and W2, a plurality of electrodeless LEDs i.e. a first LED L1 and a second LED L2. Further, the integrated circuit 102 has a total of nine pins including a first I/O pin IO1, a second I/O pin 102, a first oscillator pin OSC1, a second oscillator pin OSC2, a voltage pin VDD, a first trigger pin TR1, a second trigger pin TR2, a control pin CH and a ground pin GND. Further, the first trigger pin TR1 is connected to a first push switch S1 and the second trigger pin TR2 is connected to a second push switch S2. And, the control pin CH is connected to a third switch K. Further, the first trigger pin TR1 is connected to the ground through the first push switch S1, the second trigger pin TR2 is connected to the ground through the second push switch S2, and the control pin CH is connected to the ground through the third switch K. The usage of these switches would control the timings of the integrated circuit 102 through the first timer pin TR1 and the second timer pin TR2. As the first LED L1 and the second LED L2 in this circuit 100B are connected in the same manner as that of the circuit 100A, thus, the first LED L1 and the second LED L2 are illuminated in the same way as described above in FIG. 1A.

[0016] In the two-way LED control circuit 100B, the first trigger pin TR1, the control pin CH and the second trigger pin TR2 are input control parts of a microcontroller (MCU) or the IC 102. Further, the first push switch S1 and the second push switch S2 are used for selecting and controlling various changes of output load. If there are more than 10 change modes in outputting or glowing of LEDs L1 and L2, the first push switch S1 can be triggered to control such change modes. When the first push switch S1 is triggered, the states of I/O pins is changed and when the first push switch S1 is triggered again, the states of I/O pins is changed again. Thus, there's one change mode corresponding to one trigger and so on and so forth. Until the time the first push switch S1 is no longer triggered, it will be a fixed change for the current trigger mode. By triggering the second push switch S2, the luminance of string lights L1 and L2 can be adjusted or the time or color can be selected which is equal to the control switch. Moreover, the control pin CH is used for timing and non-timing fixed mode in which opening of the third switch K is for timing (the time can be set randomly or as per the need of user group) and closing of the third switch K is for non-timing. That is, the third switch K will not be closed at a fixed time and will work all the time. So, the first trigger pin TR1 and the second trigger pin TR2 as well as the control pin CH are for all kinds of control of the output string lights and the specific control purposes are designed according to customer's needs.

[0017] The explanation provided above for illuminating the first LED L1 and the second LED L2 of FIG. 1 is also captured in an exemplary Table 1 provided below for ease of understanding. The combination of states explained above and provided in Table 1 are exemplary and there can be more combination of states as per the logic design of high state and the low state. If intermittent frequency sweep of the IC 102 or an MCU (Microcontroller) program is used for controlling the illumination, the first LED L1 and the second LED L2 can be on simultaneously or various gradient effects may be achieved, and countless light changes can be realized by programming.

Table 1

State of IO1 Pin	State of IO2 Pin	LED Illuminated
High	Low	L2
Low	High	L1
High	High	None of the LEDs is illuminated
High	Suspended	None of the LEDs is illuminated
Low	Low	None of the LEDs is illuminated
Low	Suspended	None of the LEDs is illuminated
Suspended	Suspended	None of the LEDs is illuminated

[0018] Referring to FIG. 2A, a three-way LED control circuit 200A is shown in accordance with a first exemplary embodiment of the invention. The three-way LED control circuit 200A is a three-way positive and negative electrodeless output and comprises, but is not limited to, an integrated circuit (IC) 102, one or more lines W1-W3, a plurality of electrodeless LEDs L1-L6. As depicted, the integrated circuit 102 has a total of eight pins including a first I/O pin IO1, a second I/O pin 102, a third I/O pin 103, a first oscillator pin OSC1, a second oscillator pin OSC2, a voltage pin VDD, a trigger pin TR and a ground pin GND. The first oscillator pin OSC1 and the second oscillator pin OSC2 are coupled to a crystal oscillator for providing a constant frequency output under varying load conditions. The ground pin GND enables the current in the IC to flow to the ground. The voltage pin VDD is coupled to a power supply that provides power to the circuit 200A. The trigger pin TR controls timing of a control cycle of the integrated circuit 102 and is connected to the ground through a push switch S.

[0019] In this circuit 200A, the first I/O pin IO1 is directly connected in series with a first line W1, the second I/O pin 102 is directly connected in series with a second line W2 and the third I/O pin 103 is directly connected in series with a third line W3. Thereby, the circuit 200A provide an IC integrated output. Further, the plurality of LEDs L1-L6 shown in FIG. 2A comprises a first LED L1, a second LED L2, a third LED L3, a fourth LED L4, a fifth LED L5 and a sixth LED L6. Each of the first LED L1, the second LED L2, the third LED L3, the fourth LED L4, the fifth LED L5 and the sixth LED L6 comprises a positive terminal and a negative terminal. As can be seen in FIG. 2A, a positive terminal of the first LED L1 is coupled to the second line W2 and a negative terminal of the first LED L1 is coupled to the first line W1. Similarly, a positive terminal of the second LED L2 is coupled to the first line W1 and a negative terminal of the second LED L2 is coupled to the second line W2. Also, a positive terminal of the third LED L3 is coupled to the second line W2 and a negative terminal of the third LED L3 is coupled to the third line W3 and a positive terminal of the fourth LED L4 is coupled to the third line W3 and a negative terminal of the fourth LED L4 is coupled to the second line W2. Further, a positive terminal of the fifth LED L5 is coupled to the first line W1 and a negative terminal of the fifth LED L5 is coupled the third line W3. Lastly, a positive terminal of the sixth LED L6 is coupled to the third line W3 and a negative terminal of the sixth LED L6 is coupled to the first line W1.

[0020] When the circuit 200A is turned on, the circuit 200A is configured to operate each of the first I/O pin IO1 and the second I/O pin 102 in one of a high state, a low state and a suspended state. Based on the state of the I/O pins, the circuit 200A is configured to operate the lines W1-W3 in one of a high level and a low level and accordingly, one or more LEDs is illuminated based on the level the lines W1-W3. The explanation for illuminating each LED will be explained below in greater details.

[0021] In order to illuminate the first LED L1, following are the possible combinations:

a) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, and the third I/O pin IO3 in the high state. As a result, the first line W1 operates in the low level, the second line W2 operates in the high level, and the third line W3 operates in the high level. In an event the first line W1 operates in the low level, the second line W2 operates in the high level and the third line W3 operates in the high level, voltage V1 at the first line W1 is less than voltage V2 at the second line W2 and voltage V3 at the third line W3. Thereby, the current flows from the second line W2 to the first line W1 and due to potential difference between these two lines W1, W2, the first LED L1 is illuminated.

b) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, and the third I/O pin IO3 in the low state. In this situation, the first line W1 operates in the low level, the second line W2 operates in the high level, and the third line W3 operates in the low level. In an event the first line W1 operates in the low level, the second line W2 operates in the high level and the third line W3 operates in the low level, voltage V1 at the first line W1 is less than voltage V2 at the second line W2. Thereby, the current flows from the second line W2 to the first line W1 and due to potential difference between these two lines W1, W2, the first LED L1 is illuminated.

c) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, and the third I/O pin IO3 in the suspended state. In this situation, the first line W1 operates in the low level, the second line W2 operates in the high level, and the third line W3 does not operate and is disabled. In an event the first line W1 operates in the low level and the second line W2 operates in the high level, voltage V1 at the first line W1 is less than voltage V2 at the second line W2. Thereby, the current flows from the second line W2 to the first line W1 and due to potential difference between these two lines W1, W2, the first LED L1 is illuminated.

[0022] In order to illuminate the second LED L2, following are the possible combinations:

a) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the low state, and the third I/O pin IO3 in the low state. As a result, the first line W1 operates in the high level, the second line W2 operates in the low level, and the third line W3 operates in the low level. In an event the first line W1 operates in the high level, the second line W2 operates in the low level and the third line W3 operates in the low level, voltage V1 at the first line W1 is more than voltage V2 at the second line W2 and voltage V3 at the third line W3. Thereby, the current flows from the first line W1 to the second line W2 and due to potential difference between these two lines W1, W2, the second LED L2 is illuminated.

b) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the low state, and the third I/O pin IO3 in the high state. In this situation, the first line W1 operates in the high level, the second line W2 operates in the low level, and the third line W3 operates in the high level. In an event the first line W1 operates in the high level, the second line W2 operates in the low level and the third line W3 operates in the high level, voltage V1 at the first line W1 is more than voltage V2 at the second line W2. Thereby, the current flows from the first line W1 to the second line W2 and due to potential difference between these two lines W1, W2, the second LED L2 is illuminated.

c) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the low state, and the third I/O pin IO3 in the suspended state. In this situation, the first line W1 operates in the high level, the second line W2 operates in the low level, and the third line W3 does not operate and is disabled. In an event the first line W1 operates in the high level and the second line W2 operates in the low level, voltage V1 at the first line W1 is more than voltage V2 at the second line W2. Thereby, the current flows from the first line W1 to the second line W2 and due to potential difference between these two lines W1, W2, the second LED L2 is illuminated.

[0023] In order to illuminate the third LED L3, following are the possible combinations:

a) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the high state, and the third I/O pin IO3 in the low state. As a result, the first line W1 operates in the high level, the second line W2 operates in the high level, and the third line W3 operates in the low level. In an event the first line W1 operates in the high level, the second line W2 operates in the high level and the third line W3 operates in the low level, voltage V2 at the second line W2 is more than voltage V3 at the third line W3. Thereby, the current flows from the second line W2 to the third line W3 and due to potential difference between these two lines W2, W3, the third LED L3 is illuminated.

b) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, and the third I/O pin IO3 in the low state. In this situation, the first line W1 operates in the low level, the second line W2 operates in the high level, and the third line W3 operates in the low level. In an event the first line W1 operates in the low level, the second line W2 operates in the high level and the third line W3 operates in the low level, voltage V3 at the third line W3 is less than voltage V2 at the second line W2. Thereby, the current flows from the second line W2 to the third line W3 and due to potential difference between these two lines W2, W3, the third LED L3 is illuminated.

c) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the suspended state, the second I/O pin IO2 in the high state, and the third I/O pin IO3 in the low state. In this situation, the first line W1 does not operate and is disabled, the second line W2 operates in the high level, and the third line W3 operates in the low level. In an event the third line W3 operates in the low level and the second line W2 operates in the high level, voltage V3 at the third line W3 is less than voltage V2 at the second line W2. Thereby, the current flows from the second line W2 to the third line W3 and due to potential difference between these two lines W2, W3, the third LED L3 is illuminated.

[0024] In order to illuminate the fourth LED L4, following are the possible combinations:

a) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the low state, and the third I/O pin IO3 in the high state. As a result, the first line W1 operates in the high level, the second line W2 operates in the low level, and the third line W3 operates in the high level. In an event the first line W1 operates in the high level, the second line W2 operates in the low level and the third line W3 operates in the high level, voltage V3 at the third line W3 is more than voltage V2 at the second line W2. Thereby, the current flows from the third line W3 to the second line W2 and due to potential difference between these two lines W2, W3, the fourth LED L4 is illuminated.

b) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the low state, and the third I/O pin IO3 in the high state. In this situation, the first line W1 operates in the low level, the second line W2 operates in the low level, and the third line W3 operates in the high level. In an event the first line W1 operates in the low level, the second line W2 operates in the low level and the third line W3 operates in the high level, voltage V2 at the second line W2 is less than voltage V3 at the third line W3. Thereby, the current flows from the third line W3 to the second line W2 and due to potential difference between these two lines W2, W3, the fourth LED L4 is illuminated.

c) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the suspended state, the second I/O pin IO2 in the low state, and the third I/O pin IO3 in the high state. In this situation, the first line W1 does not operate and is disabled, the second line W2 operates in the low level, and the third line W3 operates in the high level. In an event the second line W2 operates in the low level and the third line W3 operates in the high level, voltage V3 at the third line W3 is more than voltage V2 at the second line W2. Thereby, the current flows from the third line W3 to the second line W2 and due to potential difference between these two lines W2, W3, the fourth LED L4 is illuminated.

[0025] In order to illuminate the fifth LED L5, following are the possible combinations:

a) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the low state, and the third I/O pin IO3 in the low state. As a result, the first line W1 operates in the high level, the second line W2 operates in the low level, and the third line W3 operates in the low level. In an event the first line W1 operates in the high level, the second line W2 operates in the low level and the third line W3 operates in the low level, voltage V1 at the first line W1 is more than voltage V3 at the third line W3. Thereby, the current flows from the first line W1 to the third line W3 and due to potential difference between these two lines W1, W3, the fifth LED L5 is illuminated.

b) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the high state, and the third I/O pin IO3 in the low state. In this situation, the first line W1 operates in the high level, the second line W2 operates in the high level, and the third line W3 operates in the low level. In an event the first line W1 operates in the high level, the second line W2 operates in the high level and the third line W3 operates in the low level, voltage V1 at the first line W1 is more than voltage V3 at the third line W3. Thereby, the current flows from the first line W1 to the third line W3 and due to potential difference between these two lines W1, W3, the fifth LED L5 is illuminated.

c) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the suspended state, and the third I/O pin IO3 in the low state. In this situation, the first line W1 operates in the high level, the second line W2 does not operate and is disabled, and the third line W3 operates in the low level. In an event the first line W1 operates in the high level and the third line W3 operates in the low level, at this point, voltage V1 at the first line W1 is more than voltage V3 at the third line W3. Thereby, the current flows from the first line W1 to the third line W3 and due to potential difference between these two lines W1, W3, the fifth LED L5 is illuminated.

[0026] In order to illuminate the sixth LED L6, following are the possible combinations:

a) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, and the third I/O pin IO3 in the high state. As a result, the first line W1 operates in the low level, the second line W2 operates in the high level, and the third line W3 operates in the high level. In an event the first line W1 operates in the low level, the second line W2 operates in the high level and the third line W3 operates in the high level, voltage V1 at the first line W1 is less than voltage V3 at the third line W3. Thereby, the current flows from the third line W3 to the first line W1 and due to potential difference between these two lines W1, W3, the sixth LED L6 is illuminated.

b) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the low state, and the third I/O pin IO3 in the high state. In this situation, the first line W1 operates in the low level, the second line W2 operates in the low level, and the third line W3 operates in the high level. In an event the first line W1 operates in the low level, the second line W2 operates in the low level and the third line W3 operates in the high level, voltage V1 at the first line W1 is less than voltage V3 at the third line W3. Thereby, the current flows from the third line W3 to the first line W1 and due to potential difference between these two lines W1, W3, the sixth LED L6 is illuminated.

c) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the suspended state, and the third I/O pin IO3 in the high state. In this situation, the first line W1 operates in the low level, the second line W2 does not operate and is disabled, and the third line W3 operates in the high level. In an event the first line W1 operates in the low level and the third line W3 operates in the high level, voltage V1 at the first line W1 is less than voltage V3 at the third line W3. Thereby, the current flows from the third line W3 to the first line W1 and due to potential difference between these two lines W1, W3, the sixth LED L6 is illuminated.

[0027] The explanation provided above with reference to 3-way LED control circuit 200A for illuminating each LED L1-L6 of FIG. 2A is also captured in an exemplary Table 2 below for ease of understanding.

Table 2

State of IO1 pin	State of IO2 pin	State of IO3 pin	LEDs illuminated
High	Low	Low	L2, L5
High	Low	High	L2, L4
High	High	Low	L3, L5
Low	High	High	L1, L6
Low	High	Low	L1, L3
Low	Low	High	L4, L6
High	Low	Suspended	L2
Suspended	Low	High	L4
Low	Suspended	High	L6
Low	High	Suspended	L1
High	Suspended	Low	L5
Suspended	High	Low	L3

[0028] Referring to Figure 2B, a three-way LED control circuit 200B is shown in accordance with a second exemplary embodiment of the invention. The three-way LED control circuit 200B is a three-way positive and negative electrodeless output and comprises, but is not limited to, an integrated circuit (IC) 102, one or more wires/lines W1-W3, a plurality of electrodeless LEDs L1-L6. Further, the integrated circuit 102 has a total of ten pins including a first I/O pin IO1, a second I/O pin 102, a third I/O pin 103, a first oscillator pin OSC1, a second oscillator pin OSC2, a voltage pin VDD, a first trigger pin TR1, a second trigger pin TR2, a control pin CH and a ground pin GND. Further, the first trigger pin TR1 is connected to a first push switch S1 and the second trigger pin TR2 is connected to a second push switch S2. And, the control pin CH is connected to a third switch K. Further, the first trigger pin TR1 is connected to the ground through the first push switch S1, the second trigger pin TR2 is connected to the ground through the second push switch S2 and the control pin CH is connected to the ground through the third switch K. The usage of these switches would control the timings of the integrated circuit 102 through the first timer pin TR1 and the second timer pin TR2. The working of the first trigger pin TR1, the second trigger pin TR2, the control pin CH, the first push switch S1, the second push switch S2 and the third switch K is same as explained above with respect to FIG. IB. It is to be noted here that each of the plurality of LEDs L1-L6 of the circuit 200B are illuminated in the same manner as described above in FIG. 2A.

[0029] Referring to FIG. 3, a four-way LED control circuit 300 is shown in accordance with an exemplary embodiment of the invention. The four-way LED control circuit 300 is a four-way positive and negative electrodeless output and comprises, but is not limited to, an integrated circuit (IC) 102, one or more lines W1-W4, a plurality of electrodeless LEDs L1-L12. As depicted, the integrated circuit 102 has a total of nine pins including a first I/O pin IO1, a second I/O pin IO2, a third I/O pin IO3, a fourth I/O pin IO4, a first oscillator pin OSC1, a second oscillator pin OSC2, a voltage pin VDD, a trigger pin TR and a ground pin GND. The first oscillator pin OSC1 and the second oscillator pin OSC2 are coupled to a crystal oscillator for providing a constant frequency output under varying load conditions. The ground pin GND enables the current in the IC to flow to the ground. The voltage pin VDD is coupled to a power supply that provides power to the circuit 300. The trigger pin TR controls timing of a control cycle of the integrated circuit 102 and is connected to the ground through a push switch S.

[0030] In this circuit 300, the first I/O pin IO1 is directly connected in series with a first line W1, the second I/O pin IO2 is directly connected in series with a second line W2, the third I/O pin IO3 is directly connected in series with a third line W3 and the fourth I/O pin 104 is directly connected in series with a fourth line W4. Thereby, the circuit 300 provide an IC integrated output. Further, the plurality of LEDs L1-L12 shown in FIG. 3 comprises a first LED L1, a second LED L2, a third LED L3, a fourth LED L4, a fifth LED L5, a sixth LED L6, a seventh LED L7, an eight LED L8, a ninth LED L9, a tenth LED L10, an eleventh LED L11 and a twelfth LED L12. Each of these LEDs L1-L12 comprises a positive terminal and a negative terminal. As can be seen in FIG. 3, a positive terminal of the first LED L1 is coupled to the second line W2 and a negative terminal of the first LED L1 is coupled to the first line W1. Similarly, a positive terminal of the second LED L2 is coupled to the first line W1 and a negative terminal of the second LED L2 is coupled to the second line W2. Also, a positive terminal of the third LED L3 is coupled to the second line W2 and a negative terminal of the third LED L3 is coupled to the third line W3 and a positive terminal of the fourth LED L4 is coupled to the third line W3 and a negative terminal of the fourth LED L4 is coupled to the second line W2. Further, a positive terminal of the fifth LED L5 is coupled to the first line W1 and a negative terminal of the fifth LED L5 is coupled the third line W3. Also, a positive terminal of the sixth LED L6 is coupled to the third line W3 and a negative terminal of the sixth LED L6 is coupled to the first line W1. Furthermore, a positive terminal of the seventh LED L7 is coupled to the fourth line W4 and a negative terminal of the seventh LED L7 is coupled to the first line W1. Similarly, a positive terminal of the eighth LED L8 is coupled to the first line W1 and a negative terminal of the eighth LED L8 is coupled to the fourth line W4. Also, a positive terminal of the ninth LED L9 is coupled to the fourth line W4 and a negative terminal of the ninth LED L9 is coupled to the third line W3 and a positive terminal of the tenth LED L10 is coupled to the third line W3 and a negative terminal of the tenth LED L10 is coupled to the fourth line W4. Further, a positive terminal of the eleventh LED L11 is coupled to the second line W2 and a negative terminal of the eleventh LED L11 is coupled the fourth line W4. Also, a positive terminal of the twelfth LED L12 is coupled to the fourth line W4 and a negative terminal of the twelfth LED L12 is coupled to the second line W2.

[0031] When the circuit 300 is turned on, the circuit 300 is configured to operate each of the first I/O pin IO1, the second I/O pin IO2, the third I/O pin IO3 and the fourth I/O pin IO4 in one of a high state, a low state and a suspended state. Based on the state of the I/O pins, the circuit 300 is configured to operate the lines W1-W4 in one of a high level and a low level and accordingly, one or more LEDs L1-L12 is illuminated based on the level the lines W1-W4. The explanation for illuminating each LED will be explained below in greater details.

[0032] In order to illuminate the first LED L1, following are the possible combinations:

a) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the low level, the second line W2 is in the high level, the third line W3 is in the high level, and the fourth line W4 is in the low level. At this instance, voltage V1 at the first line W1 is less than voltage V2 at the second line W2 and thereby, the current flow from the second line W2 to the first line W1 causing the first LED L1 to illuminate.

b) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the low level, the second line W2 is in the high level, the third line W3 is in the low level, and the fourth line W4 is in the low level. At this instance, voltage V1 at the first line W1 is less than voltage V2 at the second line W2 and thereby, the current flow from the second line W2 to the first line W1 causing the first LED L1 to illuminate.

c) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the high state. In such an event, the first line W1 is in the low level, the second line W2 is in the high level, the third line W3 is in the high level, and the fourth line W4 is in the high level. At this instance, voltage V1 at the first line W1 is less than voltage V2 at the second line W2 and thereby, the current flow from the second line W2 to the first line W1 causing the first LED L1 to illuminate.

d) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the low level, the second line W2 is in the high level, the third line W3 is in the low level, and the fourth line W4 is in the low level. At this instance, voltage V1 at the first line W1 is less than voltage V2 at the second line W2 and thereby, the current flow from the second line W2 to the first line W1 causing the first LED L1 to illuminate.

e) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the suspended state, and the fourth I/O pin IO4 in the suspended state. In such an event, the first line W1 is in the low level, the second line W2 is in the high level, the third line W3 and the fourth line W4 are disabled. At this instance, voltage V1 at the first line W1 is less than voltage V2 at the second line W2 and thereby, the current flow from the second line W2 to the first line W1 causing the first LED L1 to illuminate.

[0033] In order to illuminate the second LED L2, following are the possible combinations:

a) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the high level, the second line W2 is in the low level, the third line W3 is in the low level, and the fourth line W4 is in the low level. At this instance, voltage V1 at the first line W1 is more than voltage V2 at the second line W2 and thereby, the current flow from the first line W1 to the second line W2 causing the second LED L2 to illuminate.

b) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the high level, the second line W2 is in the low level, the third line W3 is in the high level, and the fourth line W4 is in the low level. At this instance, voltage V1 at the first line W1 is more than voltage V2 at the second line W2 and thereby, the current flow from the first line W1 to the second line W2 causing the second LED L2 to illuminate.

c) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the high state. In such an event, the first line W1 is in the high level, the second line W2 is in the low level, the third line W3 is in the high level, and the fourth line W4 is in the high level. At this instance, voltage V1 at the first line W1 is more than voltage V2 at the second line W2 and thereby, the current flow from the first line W1 to the second line W2 causing the second LED L2 to illuminate.

d) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the suspended state, and the fourth I/O pin IO4 in the suspended state. In such an event, the first line W1 is in the high level, the second line W2 is in the low level, the third line W3 and the fourth line W4 are disabled. At this instance, voltage V1 at the first line W1 is more than voltage V2 at the second line W2 and thereby, the current flow from the first line W1 to the second line W2 causing the second LED L2 to illuminate.

[0034] In order to illuminate the third LED L3, following are the possible combinations:

a) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the high level, the second line W2 is in the high level, the third line W3 is in the low level, and the fourth line W4 is in the low level. At this instance, voltage V2 at the second line W2 is more than voltage V3 at the third line W3 and thereby, the current flow from the second line W2 to the third line W3 causing the third LED L3 to illuminate.

b) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the low level, the second line W2 is in the high level, the third line W3 is in the low level, and the fourth line W4 is in the low level. At this instance, voltage V2 at the second line W2 is more than voltage V3 at the third line W3 and thereby, the current flow from the second line W2 to the third line W3 causing the third LED L3 to illuminate.

c) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the high state. In such an event, the first line W1 is in the high level, the second line W2 is in the high level, the third line W3 is in the low level, and the fourth line W4 is in the high level. At this instance, voltage V2 at the second line W2 is more than voltage V3 at the third line W3 and thereby, the current flow from the second line W2 to the third line W3 causing the third LED L3 to illuminate.

d) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the high state. In such an event, the first line W1 is in the low level, the second line W2 is in the high level, the third line W3 is in the low level, and the fourth line W4 is in the high level. At this instance, voltage V2 at the second line W2 is more than voltage V3 at the third line W3 and thereby, the current flow from the second line W2 to the third line W3 causing the third LED L3 to illuminate.

e) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the suspended state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the suspended state. In such an event, the second line W2 is in the high state, the first line W1 and the fourth line W4 are disabled, the third line W3 is in the low level. At this instance, voltage V2 at the second line W2 is more than voltage V3 at the third line W3 and thereby, the current flow from the second line W2 to the third line W3 causing the third LED L3 to illuminate.

[0035] In order to illuminate the fourth LED L4, following are the possible combinations:

a) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the high level, the second line W2 is in the low level, the third line W3 is in the high level, and the fourth line W4 is in the low level. At this instance, voltage V3 at the third line W3 is more than voltage V2 at the second line W2 and thereby, the current flow from the third line W3 to the second line W2 causing the fourth LED L4 to illuminate.

b) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the low level, the second line W2 is in the low level, the third line W3 is in the high level, and the fourth line W4 is in the low level. At this instance, voltage V3 at the third line W3 is more than voltage V2 at the second line W2 and thereby, the current flow from the third line W3 to the second line W2 causing the fourth LED L4 to illuminate.

c) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the high state. In such an event, the first line W1 is in the low level, the second line W2 is in the low level, the third line W3 is in the high level, and the fourth line W4 is in the high level. At this instance, voltage V3 at the third line W3 is more than voltage V2 at the second line W2 and thereby, the current flow from the third line W3 to the second line W2 causing the fourth LED L4 to illuminate.

d) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the high state. In such an event, the first line W1 is in the high level, the second line W2 is in the low level, the third line W3 is in the high level, and the fourth line W4 is in the high level. At this instance, voltage V3 at the third line W3 is more than voltage V2 at the second line W2 and thereby, the current flow from the third line W3 to the second line W2 causing the fourth LED L4 to illuminate.

e) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the suspended state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the suspended state. In such an event, the first line W1 and the fourth line W4 are disabled, the second line W2 is in the low level, and the third line W3 is in the high level. At this instance, voltage V3 at the third line W3 is more than voltage V2 at the second line W2 and thereby, the current flow from the third line W3 to the second line W2 causing the fourth LED L4 to illuminate.

[0036] In order to illuminate the fifth LED L5, following are the possible combinations:

a) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the high level, the second line W2 is in the low level, the third line W3 is in the low level, and the fourth line W4 is in the low level. At this instance, voltage V3 at the third line W3 is less than voltage V1 at the first line W1 and thereby, the current flow from the first line W1 to the third line W3 causing the fifth LED L5 to illuminate.

b) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the high level, the second line W2 is in the high level, the third line W3 is in the low level, and the fourth line W4 is in the low level. At this instance, voltage V3 at the third line W3 is less than voltage V1 at the first line W1 and thereby, the current flow from the first line W1 to the third line W3 causing the fifth LED L5 to illuminate.

c) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin 102 in the high state, the third I/O pin 103 in the low state, and the fourth I/O pin 104 in the high state. In such an event, the first line W1 is in the high level, the second line W2 is in the high level, the third line W3 is in the low level, and the fourth line W4 is in the high level. At this instance, voltage V3 at the third line W3 is less than voltage V1 at the first line W1 and thereby, the current flow from the first line W1 to the third line W3 causing the fifth LED L5 to illuminate.

d) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the suspended state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the suspended state. In such an event, the first line W1 is in the high level and the third line W3 is in the low level, the second line W2 and the fourth line W4 are disabled. At this instance, voltage V3 at the third line W3 is less than voltage V1 at the first line W1 and thereby, the current flow from the first line W1 to the third line W3 causing the fifth LED L5 to illuminate.

[0037] In order to illuminate the sixth LED L6, following are the possible combinations:

a) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the low level, the second line W2 is in the high level, the third line W3 is in the high level, and the fourth line W4 is in the low level. At this instance, voltage V3 at the third line W3 is more than voltage V1 at the first line W1 and thereby, the current flow from the third line W3 to the first line W1 causing the sixth LED L6 to illuminate.

b) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the low level, the second line W2 is in the low level, the third line W3 is in the high level, and the fourth line W4 is in the low level. At this instance, voltage V3 at the third line W3 is more than voltage V1 at the first line W1 and thereby, the current flow from the third line W3 to the first line W1 causing the sixth LED L6 to illuminate.

c) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin 102 in the low state, the third I/O pin 103 in the high state, and the fourth I/O pin 104 in the high state. In such an event, the first line W1 is in the low level, the second line W2 is in the low level, the third line W3 is in the high level, and the fourth line W4 is in the high level. At this instance, voltage V3 at the third line W3 is more than voltage V1 at the first line W1 and thereby, the current flow from the third line W3 to the first line W1 causing the sixth LED L6 to illuminate.

d) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the high state, and the fourth I/O pin 1O4 in the high state. In such an event, the first line W1 is in the low level, the second line W2 is in the high level, the third line W3 is in the high level, and the fourth line W4 is in the high level. At this instance, voltage V3 at the third line W3 is more than voltage V1 at the first line W1 and thereby, the current flow from the third line W3 to the first line W1 causing the sixth LED L6 to illuminate.

e) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the suspended state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the suspended state. In such an event, the first line W1 is in the low level and the third line W3 in the high level, the second line W2 and the fourth line W4 are disabled. At this instance, voltage V3 at the third line W3 is more than voltage V1 at the first line W1 and thereby, the current flow from the third line W3 to the first line W1 causing the sixth LED L6 to illuminate.

[0038] In order to illuminate the seventh LED L7, following are the possible combinations:

a) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the high state. In such an event, the first line W1 is in the low level, the second line W2 is in the low level, the third line W3 is in the low level, and the fourth line W4 is in the high level. At this instance, voltage V1 at the first line W1 is less than voltage V4 at the fourth line W4 and thereby, the current flow from the fourth line W4 to the first line W1 causing the seventh LED L7 to illuminate.

b) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the high state. In such an event, the first line W1 is in the low level, the second line W2 is in the low level, the third line W3 is in the high level, and the fourth line W4 is in the high level. At this instance, voltage V1 at the first line W1 is less than voltage V4 at the fourth line W4 and thereby, the current flow from the fourth line W4 to the first line W1 causing the seventh LED L7 to illuminate.

c) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the high state. In such an event, the first line W1 is in the low level, the second line W2 is in the high level, the third line W3 is in the high level, and the fourth line W4 is in the high level. At this instance, voltage V1 at the first line W1 is less than voltage V4 at the fourth line W4 and thereby, the current flow from the fourth line W4 to the first line W1 causing the seventh LED L7 to illuminate.

d) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the high state. In such an event, the first line W1 is in the low level, the second line W2 is in the high level, the third line W3 is in the low level, and the fourth line W4 is in the high level. At this instance, voltage V1 at the first line W1 is less than voltage V4 at the fourth line W4 and thereby, the current flow from the fourth line W4 to the first line W1 causing the seventh LED L7 to illuminate.

e) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the suspended state, the third I/O pin IO3 in the suspended state, and the fourth I/O pin IO4 in the high state. In such an event, the first line W1 is in the low level and the fourth line W4 is in the high level, the second line W2 and the third line W4 are disabled. At this instance, voltage V1 at the first line W1 is less than voltage V4 at the fourth line W4 and thereby, the current flow from the fourth line W4 to the first line W1 causing the seventh LED L7 to illuminate.

[0039] In order to illuminate the eight LED L8, following are the possible combinations:

a) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the high level, the second line W2 is in the low level, the third line W3 is in the low level, and the fourth line W4 is in the low level. At this instance, voltage V1 at the first line W1 is more than voltage V4 at the fourth line W4 and thereby, the current flow from the first line W1 to the fourth line W4 causing the eight LED L8 to illuminate.

b) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the high level, the second line W2 is in the low level, the third line W3 is in the high level, and the fourth line W4 is in the low level. At this instance, voltage V1 at the first line W1 is more than voltage V4 at the fourth line W4 and thereby, the current flow from the first line W1 to the fourth line W4 causing the eight LED L8 to illuminate.

c) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the high level, the second line W2 is in the high level, the third line W3 is in the low level, and the fourth line W4 is in the low level. At this instance, voltage V1 at the first line W1 is more than voltage V4 at the fourth line W4 and thereby, the current flow from the first line W1 to the fourth line W4 causing the eight LED L8 to illuminate.

d) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the suspended state, the third I/O pin IO3 in the suspended state, and the fourth I/O pin IO4 in the low state. In such an event, the second line W2 and the third line W3 are disabled and the first line W1 is in the high level and the fourth line W4 in the low level. At this instance, voltage V1 at the first line W1 is more than voltage V4 at the fourth line W4 and thereby, the current flow from the first line W1 to the fourth line W4 causing the eight LED L8 to illuminate.

[0040] In order to illuminate the ninth LED L9, following are the possible combinations:

a) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the high state. In such an event, the first line W1 is in the low level, the second line W2 is in the low level, the third line W3 is in the low level, and the fourth line W4 is in the high level. At this instance, voltage V4 at the fourth line W4 is more than voltage V3 at the third line W3 and thereby, the current flow from the fourth line W4 to the third line W3 causing the ninth LED L9 to illuminate.

b) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the high state. In such an event, the first line W1 is in the high level, the second line W2 is in the high level, the third line W3 is in the low level, and the fourth line W4 is in the high level. At this instance, voltage V4 at the fourth line W4 is more than voltage V3 at the third line W3 and thereby, the current flow from the fourth line W4 to the third line W3 causing the ninth LED L9 to illuminate.

c) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the high state. In such an event, the first line W1 is in the low level, the second line W2 is in the high level, the third line W3 is in the low level, and the fourth line W4 is in the high level. At this instance, voltage V4 at the fourth line W4 is more than voltage V3 at the third line W3 and thereby, the current flow from the fourth line W4 to the third line W3 causing the ninth LED L9 to illuminate.

d) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the suspended state, the second I/O pin IO2 in the suspended state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the low state. In such an event, the fourth line W4 is in the low level and the third line W3 is in the high level, the first line W1 and the second line W2 are disabled. At this instance, voltage V4 at the fourth line W4 is more than voltage V3 at the third line W3 and thereby, the current flow from the fourth line W4 to the third line W3 causing the ninth LED L9 to illuminate.

[0041] In order to illuminate the tenth LED L10, following are the possible combinations:

a) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the high level, the second line W2 is in the low level, the third line W3 is in the high level, and the fourth line W4 is in the low level. At this instance, voltage V3 at the third line W3 is more than voltage V4 at the fourth line W4 and thereby, the current flow from the third line W3 to the fourth line W4 causing the tenth LED L10 to illuminate.

b) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the low level, the second line W2 is in the high level, the third line W3 is in the high level, and the fourth line W4 is in the low level. At this instance, voltage V3 at the third line W3 is more than voltage V4 at the fourth line W4 and thereby, the current flow from the third line W3 to the fourth line W4 causing the tenth LED L10 to illuminate.

c) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the low level, the second line W2 is in the low level, the third line W3 is in the high level, and the fourth line W4 is in the low level. At this instance, voltage V3 at the third line W3 is more than voltage V4 at the fourth line W4 and thereby, the current flow from the third line W3 to the fourth line W4 causing the tenth LED L10 to illuminate.

d) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the suspended state, the second I/O pin IO2 in the suspended state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the low state. In such an event, the second line W2 and the first line W1 are disabled and the third line W3 is in the high level and the fourth line is in the low level. At this instance, voltage V3 at the third line W3 is more than voltage V4 at the fourth line W4 and thereby, the current flow from the third line W3 to the fourth line W4 causing the tenth LED L10 to illuminate.

[0042] In order to illuminate the eleventh LED L11, following are the possible combinations:

a) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the high level, the second line W2 is in the high level, the third line W3 is in the low level, and the fourth line W4 is in the low level. At this instance, voltage V2 at the second line W2 is more than voltage V4 at the fourth line W4 and thereby, the current flow from the second line W2 to the fourth line W4 causing the eleventh LED L11 to illuminate.

b) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the low level, the second line W2 is in the high level, the third line W3 is in the high level, and the fourth line W4 is in the low level. At this instance, voltage V2 at the second line W2 is more than voltage V4 at the fourth line W4 and thereby, the current flow from the second line W2 to the fourth line W4 causing the eleventh LED L11 to illuminate.

c) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 is in the low level, the second line W2 is in the high level, the third line W3 is in the low level, and the fourth line W4 is in the low level. At this instance, voltage V2 at the second line W2 is more than voltage V4 at the fourth line W4 and thereby, the current flow from the second line W2 to the fourth line W4 causing the eleventh LED L11 to illuminate.

d) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the suspended state, the second I/O pin IO2 in the high state, the third I/O pin IO3 in the suspended state, and the fourth I/O pin IO4 in the low state. In such an event, the first line W1 and the third line W3 are disabled and the second line W2 is in the high level and the fourth line W4 is in the low level. At this instance, voltage V2 at the second line W2 is more than voltage V4 at the fourth line W4 and thereby, the current flow from the second line W2 to the fourth line W4 causing the eleventh LED L11 to illuminate.

[0043] In order to illuminate the twelfth LED L12, following are the possible combinations:

a) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the low state, and the fourth I/O pin IO4 in the high state. In such an event, the first line W1 is in the low level, the second line W2 is in the low level, the third line W3 is in the low level, and the fourth line W4 is in the high level. At this instance, voltage V2 at the second line W2 is less than voltage V4 at the fourth line W4 and thereby, the current flow from the fourth line W4 to the second line W2 causing the twelfth LED L12 to illuminate.

b) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the low state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the high state, and the fourth I/O pin IO4 in the high state. In such an event, the first line W1 is in the low level, the second line W2 is in the low level, the third line W3 is in the high level, and the fourth line W4 is in the high level. At this instance, voltage V2 at the second line W2 is less than voltage V4 at the fourth line W4 and thereby, the current flow from the fourth line W4 to the second line W2 causing the twelfth LED L12 to illuminate.

c) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the high state, the second I/O pin 102 in the low state, the third I/O pin 103 in the high state, and the fourth I/O pin 104 in the high state. In such an event, the first line W1 is in the high level, the second line W2 is in the low level, the third line W3 is in the high level, and the fourth line W4 is in the high level. At this instance, voltage V2 at the second line W2 is less than voltage V4 at the fourth line W4 and thereby, the current flow from the fourth line W4 to the second line W2 causing the twelfth LED L12 to illuminate.

d) The integrated circuit 102 is configured to operate the first I/O pin IO1 in the suspended state, the second I/O pin IO2 in the low state, the third I/O pin IO3 in the suspended state, and the fourth I/O pin IO4 in the high state. In such an event, the second line W2 is in the low level and the fourth line W4 is in the high level, the first line W1 and the third line W3 are disabled. At this instance, voltage V2 at the second line W2 is less than voltage V4 at the fourth line W4 and thereby, the current flow from the fourth line W4 to the second line W2 causing the twelfth LED L12 to illuminate.

[0044] The explanation provided above with reference to 4-way LED control circuit 300 for illuminating each LED LI-L12 of FIG. 3 is also captured in an exemplary Table 3 below for ease of understanding.

Table 3

State of IO1 pin	State of IO2 pin	State of IO3 pin	State of IO4 pin	LEDs illuminated
High	Low	Low	Low	L2, L5, L8
High	Low	High	Low	L2, L4, L10, L8
High	High	Low	Low	L3, L11, L8, L5
Low	High	High	Low	L1, L11, L10, L6
Low	High	Low	Low	L1, L11, L3
Low	Low	High	Low	L4, L6, L10
Low	Low	Low	High	L9, L7, L12
Low	Low	High	High	L4, L6, L7, L12
Low	High	High	High	L1, L6, L7
High	High	Low	High	L3, L5, L9
High	Low	High	High	L2, L4, L12
Low	High	Low	High	L1, L3, L7, L9
Low	High	Suspended	Suspended	L1
High	Low	Suspended	Suspended	L2
Suspended	High	Low	Suspended	L3
Suspended	Low	High	Suspended	L4
High	Suspended	Low	Suspended	L5
Low	Suspended	High	Suspended	L6
Low	Suspended	Suspended	High	L7
High	Suspended	Suspended	Low	L8
Suspended	Suspended	Low	High	L9
Suspended	Suspended	High	Low	L10
Suspended	High	Suspended	Low	L11
Suspended	Low	Suspended	High	L12

[0045] As used herein, the term "high level" used for any of the lines shown in any circuit refers to a level of current or voltage in a particular line that is enough to glow a particular LED.

[0046] As used herein, the term "low level" used for any of the lines shown in any circuit refers to a level of current or voltage in a particular line that is less than the voltage or current when a particular line is in the "high level".

[0047] As used herein, the term "high state" for any of the I/O pins shown in any circuit refers to a state when there is maximum current or voltage output in an I/O pin. In the high state, the I/O pin is enabled. In an exemplary embodiment, the level of current is up to 5000 mA and/or voltage is up to 260 volts when a particular I/O pin operates in the high state.

[0048] As used herein, the term "low state" used for any of the I/O pins shown in any circuit refers to a state when there is very low or minimal current or voltage output in an I/O pin. In the low state, the I/O pin is enabled. In an exemplary embodiment, the level of current is up to 3mA and/or voltage is up to 3 volts when a particular I/O pin operates in the low state.

[0049] As used herein, the term "suspended state" used for any of the I/O pins shown in any circuit refers to a state when there is no current or voltage output in an I/O pin. In the suspended state, the I/O is disabled.

[0050] Several examples are provided herein for using different current and voltage values to illuminate the LEDs in any circuit 100A/100B/200A/200B/300. Example 1: If the input voltage is 4.5V and the output load (i.e. LEDs) needs 200MA, then a current-limiting resistor may be connected in series at the output end. In this way, the required current can be adjusted according to the load requirements. If the output load does not need too large current and only needs 10MA, the current-limiting resistance value can be larger. And if the output load needs 1000MA (i.e. 1A), it will be fine if the current limiting resistance value is smaller than the value. Example 2: If the input voltage is 6V and the output load needs 200MA, just connect a current-limiting resistor in series at the output end. In this way, the required current can be adjusted according to the load requirements. If the output load does not need too large current and only needs 10MA, then the current limiting resistance can be larger. And if the output load needs 1000MA (i.e. 1A), it will be fine if the current limiting resistance value is smaller than the value. Example 3: If the input voltage is 3V and the output load needs 200MA, just connect a current-limiting resistor in series at the output end. In this way, the required current can be adjusted according to the load requirements. If the output load does not need too large a current and only needs 10MA, then the current limiting resistance can be larger; And if the output load needs 1000MA (i.e. 1A), it will be fine if the current limiting resistance value is smaller than the value.

[0051] Although exemplary Table 1, Table 2 and Table 3 shows a limited combinations of various states of I/O pins to glow/illuminate a particular electrodeless LED; however, other possible combinations of various states can be achieved if the frequency is controlled by a microcontroller (MCU) or the IC to illuminate an LED in any of the two-way control circuit 100A/100B, the three-way control circuit 200A/200B and the four-way control circuit 300 by changing state of I/O pins which is also within the scope of the present invention. Further, the I/O pins shown in each of the two-way control circuit 100A/100B, the three-way control circuit 200A/200B and the four-way control circuit 300 can output current of 0-1A to their respective LEDs.

[0052] Referring to FIG. 4, a method 400 for illuminating at least one of a first electrodeless LED L1 and a second electrodeless LED L2 of circuit 100A/100B in accordance with an exemplary embodiment of the invention. The method 400 starts at step 402.
At step 404, a first I/O pin IO1 and a second I/O pin IO2 of an integrated circuit 102 are operated. As explained above, each of the I/O pins IO1-IO2 are operated in one of a high state and a low state. In an exemplary embodiment, the first I/O pin IO1 operates in a low state and the second I/O pin IO2 operates in a high state. In another exemplary embodiment, the first I/O pin IO1 operates in a high state and the second I/O pin IO2 operates in a low state as explained in Table 1 above.
At step 406, the circuit 100A/100B operates at least one of a first line W1 and a second line W2 in one of a low level and a high level. Further, the first line W1 is directly connected in series with the first I/O pin IO1 and the second line W2 is directly connected in series with the second I/O pin IO2. In an exemplary embodiment, the first line W1 is in a low level in an event the first I/O pin IO1 operates in the low state and the second line is in a high level in an event the second I/O pin IO2 operates in a high state. In another exemplary embodiment, the first line W1 is in a high level in an event the first I/O pin IO1 operates in a high state and the second line is in a low level in an event the second I/O pin IO2 operates in a low state as explained in FIG. 1A above.
At step 408, the circuit 100A/100B illuminates the at least one of the first LED L1 and the second LED L2 coupled between the first line W1 and the second line W2 based on the high level or the low level of the first line W1 and the second line W2. Illumination of each of the first LED L1 and the second LED L2 is explained above in the description of FIG. 1A. In an exemplary embodiment, the first LED L1 is illuminated in an event the first line W1 is in the low level and the second line W2 is in the high level and the first I/O pin IO1 operates in the low state and the second I/O pin IO2 operates in the high state. In an exemplary embodiment, the second LED L2 is illuminated in an event the first line W1 is in the high level and the second line W2 is in the low level and the first I/O pin IO1 operates in the high state and the second I/O pin IO2 operates in the low state. At step 410, the method 400 ends.

[0053] Referring to FIG. 5, a method 500 for illuminating at least one of a plurality of electrodeless LEDs L1- L6 circuit 200A/200B in accordance with an exemplary embodiment of the invention. The method 500 starts at step 502.
At step 504, a first I/O pin IO1, a second I/O pin IO2 and a third I/O pin IO3 of an integrated circuit 102 are operated. As explained above, each of the I/O pins IO1-IO3 are operated in one of a high state, a low state and a suspended state. For an instance, the first I/O pin IO1 operates in the low state, the second I/O pin IO2 operates in the high state, and the third I/O pin IO3 operates in the high state. In other instance, the first I/O pin IO1 operates in the low state, the second I/O pin IO2 operates in the high state, and the third I/O pin IO3 operates in the suspended state.
At step 506, the circuit 200A/200B operates at least one of a first line W1, a second line W2 and a third line W3 in one of a low level and a high level. Further, the first line W1 is directly connected in series with the first I/O pin IO1, the second line W2 is directly connected in series with the second I/O pin IO2 and the third line W3 is directly connected in series with the third I/O pin IO3. For an instance, the first I/O pin IO1 operating in the low state enables the first line W1 to operate in low level, the second I/O pin IO2 operating in the high state enables the second line W2 to operate in high level, and the third I/O pin IO3 operating in the high state enables the third line W3 to operate in high level.
At step 508, the circuit 200A/200B illuminates the at least one of the plurality of LEDs L1-L6 coupled between at least two of the first line W1, the second line W2 and the third line W3. Also, the at least one of the plurality of LEDs L1-L6 is illuminated based on a level of the at least two of the first line W1, the second line W2 and the third line W3. Illumination of each of the plurality of LEDs L1-L6 is explained above in the description of FIG. 2A. IN an exemplary embodiment, the first LED L1 is illuminated in an event the first I/O pin IO1 operates in the low state, the second I/O pin IO2 operates in the high state, and the third I/O pin IO3 operates in the high state. In another exemplary embodiment, the fifth LED L5 is illuminated in an event the first I/O pin IO1 operates in the high state, the second I/O pin IO2 operates in the suspended state, and the third I/O pin IO3 operates in the low state. At step 510, the method 500 ends.

[0054] Referring to FIG. 6, a method 600 for illuminating at least one of a plurality of electrodeless LEDs L1- L12 of a circuit 300 in accordance with another exemplary embodiment of the invention. The method 600 starts at step 602.
At step 604, a first I/O pin IO1, a second I/O pin IO2, a third I/O pin IO3 and a fourth I/O pin IO4 of an integrated circuit 102 are operated in one of low state, a high state and a suspended state. For an example, the first I/O pin IO1 operates in the high state, the second I/O pin IO2 operates in the low state, the third I/O pin IO3 operates in the high state, and the fourth I/O pin IO4 operates in the high state. In another example, the first I/O pin IO1 operates in the high state, the second I/O pin IO2 operates in the low state, the third I/O pin IO3 operates in the suspended state, and the fourth I/O pin IO4 operates in the suspended state.
At step 606, the circuit 300 operates at least one of a first line W1, a second line W2, a third line W3 and a fourth line W4 in one of a high level and a low level. For an example, the first I/O pin IO1 operating in the high state enables the first line W1 to operate in the high level, the second I/O pin IO2 operating in the low state enables the second line W2 to operate in the low level, the third I/O pin IO3 operating in the high state enables the third line W3 to operate in the high level, and the fourth I/O pin 104 operating in the high state enables the fourth line W4 to operate in the high level. Further, the first line W1 is directly connected in series with the first I/O pin IO1, the second line W2 is directly connected in series with the second I/O pin 102, the third line W3 is directly connected in series with the third I/O pin 103, and the fourth line W4 is directly connected in series with the fourth I/O pin 104 as shown in Figure 3.
At step 608, the circuit 300 illuminates the at least one of the plurality of LEDs L1-L12 coupled between at least two of the first line W1, the second line W2, the third line W3 and the fourth line W4. Also, the at least one of the plurality of LEDs L1-L12 is illuminated based on the high level or the low level of the at least two of the first line W1, the second line W2, the third line W3 and the fourth line W4. Illumination of each of the plurality of LEDs L1-L12 in various possible ways is explained above in the description of FIG. 3. For an example, the second LED L2 is illuminated in an event the first I/O pin IO1 operates in the high state, the second I/O pin IO2 operates in the low state, the third I/O pin IO3 operates in the high state, and the fourth I/O pin IO4 operates in the high state. In another example, the second LED L2 is illuminated in an event the first I/O pin IO1 operates in the high state, the second I/O pin IO2 operates in the low state, the third I/O pin IO3 operates in the suspended state, and the fourth I/O pin IO4 operates in the suspended state. At step 610, the method 600 ends.

[0055] The present invention mentions two electrodeless LEDs in the two-way control circuit 100A/100B, six electrodeless LEDs in the three-way control circuit 200A/200B and twelve electrodeless LEDs in the four-way control circuit 300. Each of the electrodeless LEDs L1-L2 in the two-way control circuit 100A/100B, each of six electrodeless LEDs L1-L6 in the three-way control circuit 200A/200B and each of the twelve electrodeless LEDs L1-L12 in the four-way control circuit 300 can be a single electrodeless LED (i.e. 1 in number) or is included in a group of electrodeless LEDs, wherein a plurality of the groups of LEDs are provided in the LED control circuit 100A/100B/200A/200B/300. The scaling up or down of the number of LEDs depends on the requirements and is within the scope of the present invention.

[0056] In an exemplary embodiment of the present invention, each of the electrodeless LEDs L1-L2 in the two-way control circuit 100A/100B, each of six electrodeless LEDs L1-L6 in the three-way control circuit 200A/200B and each of the twelve electrodeless LEDs L1-L12 in the four-way control circuit 300 can glow one at a time or one after another. In a different exemplary embodiment of the present invention, each of two electrodeless LEDs L1-L2 in the two-way control circuit 100A/100B, each of six electrodeless LEDs L1-L6 in the three-way control circuit 200A/200B and each of the twelve electrodeless LEDs L1-L12 in the four-way control circuit 300 may glow simultaneously at the same time.

[0057] The present invention has industry applicability in the field of electronic equipment, where an LED can be used as a control light such as in a remote control of the electronic equipment. Additionally, the present invention is applicable in firework lights, meteor lights, marquee lights, billboards, fairy and decorative LED lights, battery box light string, a control machine of solar light, a control machine of solar light series, a control machine of universal serial bus (USB) and several of transformer AC to DC external control.

[0058] The present invention provides several technical advantages over the prior systems or circuits which are as follows: a) Effective and efficient control of multiple LEDs by using two-way to multi-way control circuits, b) Ensures a high degree of safety and effectiveness in the control and power supply of various electrical end circuits, c) Functions inexpensively and without great effort, d) Reliably control a large number and complex power systems regardless of the level of the external load needed, e) Guarantees stable and variable output power, f) Easy control of positive and negative electrodeless outputs, g) Eliminates the need of peripheral component chip thereby reducing the cost and h) Provides output circuit more than 0-1A reducing the cost of both labor and material.
Further statements of invention:

1. A two-way light emitting diode (LED) control circuit for illuminating at least one of a first LED and a second LED, the circuit comprising:

• an integrated circuit (IC) having a first input-output (I/O) pin and a second I/O pin, wherein each of the first I/O pin and the second I/O pin is configured to operate in one of a low state and a high state; and
• a first line connected with the first I/O pin and a second line connected with the second I/O pin; wherein

  each of the first LED and the second LED is coupled between the first line and the second line,

  at least one of the first LED and the second LED is illuminated based on a level of the first line and the second line, and

  the level is one of a high level and a low level.

2. The two-way light emitting diode (LED) control circuit according to item 1, wherein each of the first LED and the second LED comprises a positive terminal and a negative terminal.

3. The two-way light emitting diode (LED) control circuit according to item 2, wherein

the positive terminal and the negative terminal of the first LED is coupled to the second line and the first line, respectively, and

the positive terminal and the negative terminal of the second LED is coupled to the first line and the second line, respectively.

4. A three-way light emitting diode (LED) control circuit for illuminating at least one of a plurality of LEDs, the circuit comprising:

• an integrated circuit (IC) having a first input-output (I/O) pin, a second I/O pin and a third I/O pin, wherein each of the first I/O pin, the second I/O pin and the third I/O pin is configured to operate in one of a low state, a high state and a suspended state;
• a first line, a second line and a third line, wherein

  the first line is connected with the first I/O pin,

  the second line is connected with the second I/O pin, and

  the third line is connected with the third I/O pin; and

• at least one of the plurality of LEDs is coupled between at least two of the first line, the second line and the third line, wherein

  the plurality of LEDs include a first LED, a second LED, a third LED, a fourth LED, a fifth LED and a sixth LED,

  at least one of the plurality of LEDs is illuminated based on a level of the at least two of the first line, the second line and the third line, and

  the level is one of a high level and a low level.

5. The three-way light emitting diode (LED) control circuit according to item 4, wherein each of the plurality of LEDs comprises a positive terminal and a negative terminal.

6. The three-way light emitting diode (LED) control circuit according to item 5, wherein

the positive terminal and the negative terminal of the first LED is coupled to the second line and the first line, respectively,

the positive terminal and the negative terminal of the second LED is coupled to the first line and the second line, respectively,

the positive terminal and the negative terminal of the third LED is coupled to the second line and the third line, respectively,

the positive terminal and the negative terminal of the fourth LED is coupled to the third line and the second line, respectively,

the positive terminal and the negative terminal of the fifth LED is coupled to the first line and the third line, respectively, and/or

the positive terminal and the negative terminal of the sixth LED is coupled to the third line and the first line, respectively.

7. The three-way light emitting diode (LED) control circuit according to item 4, wherein the IC further comprising:

a crystal oscillator coupled between a first oscillator pin and a second oscillator pin, the crystal oscillator is configured to provide a constant frequency output under varying load conditions,

a voltage pin coupled to a power supply,

a ground pin coupled to the ground,

a first trigger pin connected to the ground through a first push switch and/or a second trigger pin connected to the ground through a second push switch, and

a control pin connected to the ground through a third switch.

8. The three-way light emitting diode (LED) control circuit according to item 4, wherein each of the first LED, the second LED, the third LED, the fourth LED, the fifth LED and the sixth LED is included in a group of LEDs, and wherein a plurality of the groups of LEDs are provided in the LED control circuit.

9. The three-way light emitting diode (LED) control circuit according to item 4, wherein

the first line is in the low level in an event the first I/O pin operates in the low state,

the first line is in the high level in an event the first I/O pin operates in the high state,

the second line is in the low level in an event the second I/O pin operates in the low state,

the second line is in the high level in an event the second I/O pin operates in the high state,

the third line is in the low level in an event the third I/O pin operates in the low state, and/or

the third line is in the high level in an event the third I/O pin operates in the high state.

10. A four-way light emitting diode (LED) control circuit for illuminating at least one of a plurality of LEDs, the circuit comprising:

• an integrated circuit (IC) having a first input-output (I/O) pin, a second I/O pin, a third I/O pin and a fourth I/O pin, wherein each of the first I/O pin, the second I/O pin, the third I/O pin and the fourth I/O pin is configured to operate in one of a low state, a high state and a suspended state;
• a first line, a second line, a third line and a fourth line, wherein

  the first line is connected with the first I/O pin,

  the second line is connected with the second I/O pin,

  the third line is connected with the third I/O pin, and

  the fourth line is connected with the fourth I/O pin; and

• at least one of the plurality of LEDs is coupled between at least two of the first line, the second line, the third line and the fourth line, wherein

  the plurality of LEDs include a first LED, a second LED, a third LED, a fourth LED, a fifth LED, a sixth LED, a seventh LED, an eight LED, a ninth LED, a tenth LED, an eleventh LED and a twelfth LED,

  at least one of the plurality of LEDs is illuminated based on a level of the at least two of the first line, the second line, the third line and the fourth line, and

  the level is one of a high level and a low level.

11. The four-way light emitting diode (LED) control circuit according to item 10, wherein each of the plurality of LEDs comprises a positive terminal and a negative terminal.

12. The four-way light emitting diode (LED) control circuit according to item 11, wherein

the positive terminal and the negative terminal of the first LED are coupled to the second line and the first line, respectively,

the positive terminal and the negative terminal of the second LED are coupled to the first line and the second line, respectively,

the positive terminal and the negative terminal of the third LED are coupled to the second line and the third line, respectively,

the positive terminal and the negative terminal of the fourth LED are coupled to the third line and the second line, respectively,

the positive terminal and the negative terminal of the fifth LED are coupled to the first line and the third line, respectively,

the positive terminal and the negative terminal of the sixth LED are coupled to the third line and the first line, respectively,

the positive terminal and the negative terminal of the seventh LED are coupled to the fourth line and the first line, respectively,

the positive terminal and the negative terminal of the eighth LED are coupled to the first line and the fourth line, respectively,

the positive terminal and the negative terminal of the ninth LED are coupled to the fourth line and the third line, respectively,

the positive terminal and the negative terminal of the tenth LED are coupled to the third line and the fourth line, respectively,

the positive terminal and the negative terminal of the eleventh LED are coupled to the second line and the fourth line, respectively, and/or

the positive terminal and the negative terminal of the twelfth LED are coupled to the fourth line and the second line, respectively.

13. The four-way light emitting diode (LED) control circuit according to item 10, wherein each of the first LED, the second LED, the third LED, the fourth LED, the fifth LED and the sixth LED is included in a group of LEDs, and wherein a plurality of the groups of LEDs are provided in the LED control circuit.

14. The four-way light emitting diode (LED) control circuit according to item 10, wherein

the first line is in the low level in an event the first I/O pin operates in the low state, the first line is in the high level in an event the first I/O pin operates in the high state, the second line is in the low level in an event the second I/O pin operates in the low state,

the second line is in the high level in an event the second I/O pin operates in the high state,

the third line is in the low level in an event the third I/O pin operates in the low state, the third line is in the high level in an event the third I/O pin operates in the high state, the fourth line is in the low level in an event the fourth I/O pin operates in the low state, and/or

the fourth line is in the high level in an event the fourth I/O pin operates in the high state.

Claims

1. A two-way light emitting diode (LED) control circuit for illuminating at least one of a first LED and a second LED, the circuit comprising:

- an integrated circuit (IC) having a first input-output (I/O) pin and a second I/O pin, wherein each of the first I/O pin and the second I/O pin is configured to operate in one of a low state and a high state; and

- a first line connected with the first I/O pin and a second line connected with the second I/O pin; wherein

each of the first LED and the second LED is coupled between the first line and the second line,

at least one of the first LED and the second LED is illuminated based on a level of the first line and the second line, and

the level is one of a high level and a low level.

2. The two-way light emitting diode (LED) control circuit according to claim 1, wherein
the first LED is illuminated in an event:

the first line is in the low level and the second line is in the high level, and

the first I/O pin operates in the low state and the second I/O pin operates in the high state, and/or

the second LED is illuminated in an event:

the first line is in the high level and the second line is in the low level, and

the first I/O pin operates in the high state and the second I/O pin operates in the low state.

3. The two-way light emitting diode (LED) control circuit according to claim 1, wherein the IC further comprising:

a crystal oscillator coupled between a first oscillator pin and a second oscillator pin,

the crystal oscillator is configured to provide a constant frequency output under varying load conditions,

a voltage pin coupled to a power supply,

a ground pin coupled to the ground,

a first trigger pin connected to the ground through a first push switch and/or a second trigger pin connected to the ground through a second push switch, and

a control pin connected to the ground through a third switch.

4. A method for illuminating at least one of a first LED and a second LED, the method comprising:

- operating a first input-output (I/O) pin and a second I/O pin of an Integrated Circuit (IC) in one of a low state and a high state;

- operating a first line and a second line in one of a high level and a low level, wherein

the first line is connected with the first I/O pin, and

the second line is connected with the second I/O pin; and

- illuminating the at least one of the first LED and the second LED coupled between the first line and the second line based on the high level or the low level of the first line and the second line.

5. A three-way light emitting diode (LED) control circuit for illuminating at least one of a plurality of LEDs, the circuit comprising:

- an integrated circuit (IC) having a first input-output (I/O) pin, a second I/O pin and a third I/O pin, wherein each of the first I/O pin, the second I/O pin and the third I/O pin is configured to operate in one of a low state, a high state and a suspended state;

- a first line, a second line and a third line, wherein

the first line is connected with the first I/O pin,

the second line is connected with the second I/O pin, and

the third line is connected with the third I/O pin; and

- at least one of the plurality of LEDs is coupled between at least two of the first line, the second line and the third line, wherein

the plurality of LEDs include a first LED, a second LED, a third LED, a fourth LED, a fifth LED and a sixth LED,

at least one of the plurality of LEDs is illuminated based on a level of the at least two of the first line, the second line and the third line, and

the level is one of a high level and a low level.

6. The three-way light emitting diode (LED) control circuit according to claim 5, wherein
the first LED is illuminated in an event one of:

the first I/O pin operates in the low state, the second I/O pin operates in the high state, and the third I/O pin operates in the high state,

the first I/O pin operates in the low state, the second I/O pin operates in the high state, and the third I/O pin operates in the low state, and

the first I/O pin operates in the low state, the second I/O pin operates in the high state, and the third I/O pin operates in the suspended state,

the second LED is illuminated in an event one of:

the first I/O pin operates in the high state, the second I/O pin operates in the low state, and the third I/O pin operates in the low state,

the first I/O pin operates in the high state, the second I/O pin operates in the low state, and the third I/O pin operates in the high state, and

the first I/O pin operates in the high state, the second I/O pin operates in the low state, and the third I/O pin operates in the suspended state,

the third LED is illuminated in an event one of:

the first I/O pin operates in the high state, the second I/O pin operates in the high state, and the third I/O pin operates in the low state,

the first I/O pin operates in the low state, the second I/O pin operates in the high state, and the third I/O pin operates in the low state, and

the first I/O pin operates in the suspended state, the second I/O pin operates in the high state, and the third I/O pin operates in the low state,

the fourth LED is illuminated in an event one of:

the first I/O pin operates in the high state, the second I/O pin operates in the low state, and the third I/O pin operates in the high state,

the first I/O pin operates in the low state, the second I/O pin operates in the low state, and the third I/O pin operates in the high state, and

the first I/O pin operates in the suspended state, the second I/O pin operates in the low state, and the third I/O pin operates in the high state,

the fifth LED is illuminated in an event one of:

the first I/O pin operates in the high state, the second I/O pin operates in the low state, and the third I/O pin operates in the low state,

the first I/O pin operates in the high state, the second I/O pin operates in the high state, and the third I/O pin operates in the low state, and

the first I/O pin operates in the high state, the second I/O pin operates in the suspended state, and the third I/O pin operates in the low state, and/or

the sixth LED is illuminated in an event one of:

the first I/O pin operates in the low state, the second I/O pin operates in the high state, and the third I/O pin operates in the high state,

the first I/O pin operates in the low state, the second I/O pin operates in the low state, and the third I/O pin operates in the high state, and

the first I/O pin operates in the low state, the second I/O pin operates in the suspended state, and the third I/O pin operates in the high state.

7. A method for illuminating at least one of a plurality of light emitting diodes (LEDs), the method comprising:

- operating a first input-output (I/O) pin, a second I/O pin and a third I/O pin of an integrated circuit (IC) in one of a low state, a high state and a suspended state;

- operating at least one of a first line, a second line and a third line in one of a high level and a low level, wherein

the first line is connected in series with the first I/O pin,

the second line is connected in series with the second I/O pin, and

the third line is connected in series with the third I/O pin; and

- illuminating the at least one of the plurality of LEDs coupled between at least two of the first line, the second line and the third line, wherein

the plurality of LEDs include a first LED, a second LED, a third LED, a fourth LED, a fifth LED and a sixth LED, and

the at least one of the plurality of LEDs is illuminated based on the high level or the low level of the at least two of the first line, the second line and the third line.

8. A four-way light emitting diode (LED) control circuit for illuminating at least one of a plurality of LEDs, the circuit comprising:

- an integrated circuit (IC) having a first input-output (I/O) pin, a second I/O pin, a third I/O pin and a fourth I/O pin, wherein each of the first I/O pin, the second I/O pin, the third I/O pin and the fourth I/O pin is configured to operate in one of a low state, a high state and a suspended state;

- a first line, a second line, a third line and a fourth line, wherein

the first line is connected with the first I/O pin,

the second line is connected with the second I/O pin,

the third line is connected with the third I/O pin, and

the fourth line is connected with the fourth I/O pin; and

- at least one of the plurality of LEDs is coupled between at least two of the first line, the second line, the third line and the fourth line, wherein

the plurality of LEDs include a first LED, a second LED, a third LED, a fourth LED, a fifth LED, a sixth LED, a seventh LED, an eight LED, a ninth LED, a tenth LED, an eleventh LED and a twelfth LED,

at least one of the plurality of LEDs is illuminated based on a level of the at least two of the first line, the second line, the third line and the fourth line, and

the level is one of a high level and a low level.

9. The four-way light emitting diode (LED) control circuit according to claim 8, wherein
the first LED is illuminated in an event one of:

the first I/O pin operates in the low state, the second I/O pin operates in the high state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the low state,

the first I/O pin operates in the low state, the second I/O pin operates in the high state,

the third I/O pin operates in the low state, and the fourth I/O pin operates in the low state,

the first I/O pin operates in the low state, the second I/O pin operates in the high state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the high state,

the first I/O pin operates in the low state, the second I/O pin operates in the high state,

the third I/O pin operates in the low state, and the fourth I/O pin operates in the low state, and/or

the first I/O pin operates in the low state, the second I/O pin operates in the high state,

the third I/O pin operates in the suspended state, and the fourth I/O pin operates in the suspended state, and/or

and/or
the second LED is illuminated in an event one of:

the first I/O pin operates in the high state, the second I/O pin operates in the low state,

the third I/O pin operates in the low state, and the fourth I/O pin operates in the low state,

the first I/O pin operates in the high state, the second I/O pin operates in the low state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the low state,

the first I/O pin operates in the high state, the second I/O pin operates in the low state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the high state, and/or

the first I/O pin operates in the high state, the second I/O pin operates in the low state,

the third I/O pin operates in the suspended state, and the fourth I/O pin operates in the suspended state.

10. The four-way light emitting diode (LED) control circuit according to claim 8, wherein
the third LED is illuminated in an event one of:

the first I/O pin operates in the high state, the second I/O pin operates in the high state, the third I/O pin operates in the low state, and the fourth I/O pin operates in the low state,

the first I/O pin operates in the low state, the second I/O pin operates in the high state,

the third I/O pin operates in the low state, and the fourth I/O pin operates in the low state,

the first I/O pin operates in the high state, the second I/O pin operates in the high state, the third I/O pin operates in the low state, and the fourth I/O pin operates in the high state,

the first I/O pin operates in the low state, the second I/O pin operates in the high state,

the third I/O pin operates in the low state, and the fourth I/O pin operates in the high state, and/or

the first I/O pin operates in the suspended state, the second I/O pin operates in the high state, the third I/O pin operates in the low state, and the fourth I/O pin operates in the suspended state, and/or

the fourth LED is illuminated in an event one of:

the first I/O pin operates in the high state, the second I/O pin operates in the low state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the low state,

the first I/O pin operates in the low state, the second I/O pin operates in the low state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the low state,

the first I/O pin operates in the low state, the second I/O pin operates in the low state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the high state,

the first I/O pin operates in the high state, the second I/O pin operates in the low state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the high state, and/or

the first I/O pin operates in the suspended state, the second I/O pin operates in the low state, the third I/O pin operates in the high state, and the fourth I/O pin operates in the suspended state.

11. The four-way light emitting diode (LED) control circuit according to claim 8, wherein
the fifth LED is illuminated in an event one of:

the first I/O pin operates in the high state, the second I/O pin operates in the low state,

the third I/O pin operates in the low state, and the fourth I/O pin operates in the low state,

the first I/O pin operates in the high state, the second I/O pin operates in the high state, the third I/O pin operates in the low state, and the fourth I/O pin operates in the low state,

the first I/O pin operates in the high state, the second I/O pin operates in the high state, the third I/O pin operates in the low state, and the fourth I/O pin operates in the high state, and/or

the first I/O pin operates in the high state, the second I/O pin operates in the suspended state, the third I/O pin operates in the low state, and the fourth I/O pin operates in the suspended state, and/or

the sixth LED is illuminated in an event one of:

the first I/O pin operates in the low state, the second I/O pin operates in the high state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the low state,

the first I/O pin operates in the low state, the second I/O pin operates in the low state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the low state,

the first I/O pin operates in the low state, the second I/O pin operates in the low state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the high state,

the first I/O pin operates in the low state, the second I/O pin operates in the high state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the high state, and/or

the first I/O pin operates in the low state, the second I/O pin operates in the suspended state, the third I/O pin operates in the high state, and the fourth I/O pin operates in the suspended state.

12. The four-way light emitting diode (LED) control circuit according to claim 8, wherein
the seventh LED is illuminated in an event one of:

the first I/O pin operates in the low state, the second I/O pin operates in the low state,

the third I/O pin operates in the low state, and the fourth I/O pin operates in the high state,

the first I/O pin operates in the low state, the second I/O pin operates in the low state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the high state,

the first I/O pin operates in the low state, the second I/O pin operates in the high state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the high state,

the first I/O pin operates in the low state, the second I/O pin operates in the high state,

the third I/O pin operates in the low state, and the fourth I/O pin operates in the high state, and/or

the first I/O pin operates in the low state, the second I/O pin operates in the suspended state, the third I/O pin operates in the suspended state, and the fourth I/O pin operates in the high state, and/or

the eighth LED is illuminated in an event one of:

the first I/O pin operates in the high state, the second I/O pin operates in the low state,

the third I/O pin operates in the low state, and the fourth I/O pin operates in the low state,

the first I/O pin operates in the high state, the second I/O pin operates in the low state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the low state,

the first I/O pin operates in the high state, the second I/O pin operates in the high state, the third I/O pin operates in the low state, and the fourth I/O pin operates in the low state, and/or

the first I/O pin operates in the high state, the second I/O pin operates in the suspended state, the third I/O pin operates in the suspended state, and the fourth I/O pin operates in the low state.

13. The four-way light emitting diode (LED) control circuit according to claim 8, wherein the ninth LED is illuminated in an event one of:

the first I/O pin operates in the low state, the second I/O pin operates in the low state,

the third I/O pin operates in the low state, and the fourth I/O pin operates in the high state,

the first I/O pin operates in the high state, the second I/O pin operates in the high state, the third I/O pin operates in the low state, and the fourth I/O pin operates in the high state,

the first I/O pin operates in the low state, the second I/O pin operates in the high state,

the third I/O pin operates in the low state, and the fourth I/O pin operates in the high state, and/or

the first I/O pin operates in the suspended state, the second I/O pin operates in the suspended state, the third I/O pin operates in the low state, and the fourth I/O pin operates in the high state, and/or

the tenth LED is illuminated in an event one of:

the first I/O pin operates in the high state, the second I/O pin operates in the low state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the low state,

the first I/O pin operates in the low state, the second I/O pin operates in the high state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the low state,

the first I/O pin operates in the low state, the second I/O pin operates in the low state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the low state, and/or

the first I/O pin operates in the suspended state, the second I/O pin operates in the suspended state, the third I/O pin operates in the high state, and the fourth I/O pin operates in the low state.

14. The four-way light emitting diode (LED) control circuit according to claim 8, wherein
the eleventh LED is illuminated in an event one of:

the first I/O pin operates in the high state, the second I/O pin operates in the high state, the third I/O pin operates in the low state, and the fourth I/O pin operates in the low state,

the first I/O pin operates in the low state, the second I/O pin operates in the high state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the low state,

the first I/O pin operates in the low state, the second I/O pin operates in the high state,

the third I/O pin operates in the low state, and the fourth I/O pin operates in the low state, and/or

the first I/O pin operates in the suspended state, the second I/O pin operates in the high state, the third I/O pin operates in the suspended state, and the fourth I/O pin operates in the low state, and/or

the twelfth LED is illuminated in an event one of:

the first I/O pin operates in the low state, the second I/O pin operates in the low state,

the third I/O pin operates in the low state, and the fourth I/O pin operates in the high state,

the first I/O pin operates in the low state, the second I/O pin operates in the low state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the high state,

the first I/O pin operates in the high state, the second I/O pin operates in the low state,

the third I/O pin operates in the high state, and the fourth I/O pin operates in the high state, and/or

the first I/O pin operates in the suspended state, the second I/O pin operates in the low state, the third I/O pin operates in the suspended state, and the fourth I/O pin operates in the high state.

15. A method for illuminating at least one of a plurality of light emitting diodes (LEDs), the method comprising:

- operating a first input-output (I/O) pin, a second I/O pin, a third I/O pin and a fourth I/O pin of an integrated circuit (IC) in one of a low state, a high state and a suspended state;

- operating at least one of a first line, a second line, a third line and a fourth line in one of a high level and a low level, wherein

the first line is connected in series with the first I/O pin,

the second line is connected in series with the second I/O pin,

the third line is connected in series with the third I/O pin, and

the fourth line is connected in series with the fourth I/O pin; and

- illuminating the at least one of the plurality of LEDs coupled between at least two of the first line, the second line, the third line and the fourth line, wherein

the plurality of LEDs include a first LED, a second LED, a third LED, a fourth LED, a fifth LED, a sixth LED, a seventh LED, an eight LED, a ninth LED, a tenth LED, an eleventh LED and a twelfth LED, and

the at least one of the plurality of LEDs is illuminated based on the high level or the low level of the at least two of the first line, the second line, the third line and the fourth line.

Drawing