Global Patent Index - EP 0015342 A1

EP 0015342 A1 19800917 - Substrate bias regulator.

Title (en)

Substrate bias regulator.

Title (de)

Substrat-Vorspannungsregler.

Title (fr)

Régulateur de polarisation de substrat.

Publication

EP 0015342 A1 19800917 (EN)

Application

EP 79302875 A 19791212

Priority

US 1752379 A 19790305

Abstract (en)

A substrate bias regulator 11 useful for controlling a variable output oscillator 12 and/or a substrate bias voltage generator 13 ist provided to control the substrate voltage on a semiconductor chip 10. A series of field effect transistors are arranged in a manner to sense the substrate voltage and to provide an output to regulate the substrate voltage. One of the series field effect transistors 16, 32 has its gate electroce connected to reference potential ground which tends to make the regulator independent of transistor thresholds.

IPC 1-7

G05F 3/20

IPC 8 full level

G11C 11/407 (2006.01); G05F 3/20 (2006.01); H01L 21/822 (2006.01); H01L 27/04 (2006.01); H01L 29/78 (2006.01)

CPC (source: EP)

G05F 3/205 (2013.01)

Citation (search report)

  • US 3609414 A 19710928 - PLESHKO PETER, et al
  • FR 2235417 A1 19750124 - IBM [US]
  • US 3913006 A 19751014 - FILLMORE RICHARD PLUMB
  • US 4072890 A 19780207 - WESTBROOK L V, et al
  • US 4049980 A 19770920 - MAITLAND DAVID STEVEN
  • IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, Digest on Technical Papers, Vol. 19, February 18, 1976 New York US E. BLASER: "Substrate and Load Gate Voltage Compensation", pages 56 and 57. * The whole article *
  • IBM TECHNICAL DISCLOSURE BULLETIN, Vol. 19, December 1976 New York US E. BLASER: "Substrate Compensation for Depletion-Mode FET Circuits", page 2530 and page 2531 * The whole article *

Designated contracting state (EPC)

DE FR GB

DOCDB simple family (publication)

EP 0015342 A1 19800917; EP 0015342 B1 19840125; DE 2966592 D1 19840301; JP S55120158 A 19800916

DOCDB simple family (application)

EP 79302875 A 19791212; DE 2966592 T 19791212; JP 2518580 A 19800229