EP 0057351 B1 19840704 - CIRCUIT FOR DELAY NORMALISATION OF INTERCONNECTED SEMICONDUCTOR CIRCUITS
Title (en)
CIRCUIT FOR DELAY NORMALISATION OF INTERCONNECTED SEMICONDUCTOR CIRCUITS
Publication
Application
Priority
US 22941781 A 19810129
Abstract (en)
[origin: US4383216A] An on chip delay regulator circuit which varies the power in logic or array circuits on the chip so as to minimize, or eliminate, chip to chip circuit speed differences caused by power supply variations and/or lot to lot process differences, temperature, etc. The on chip delay regulator accomplishes this by comparing a periodic reference signal to a periodic on chip generated signal which is sensitive to power supply changes, lot to lot process changes, temperature, etc. The comparison creates an error signal which is used to change the power (current or voltage) supplied to the on chip circuits. By changing the circuit power, the circuit speed (gate delay) is increased or decreased as necessary to maintain a relatively constant circuit speed on each chip. For example, a plurality of integrated circuit chips each contain an on chip delay regulator. The on chip delay regulator on each chip of said plurality of integrated circuit chips receives and responds to the same signal (or clock). Each chip provides a discrete on chip generated signal related to the parameters of the chip. The gate delay (or speed) of the circuitry on each chip is determined by its on chip delay regulator under control of the common reference signal (or clock). At least certain of the chips include an AC measurement circuit for comparing the periodicity of said reference signal with the periodicity of said on generated chip signal and cooperating with the delay regulator thereof to provide one of three discrete electrical manifestations.
IPC 1-7
IPC 8 full level
H01L 21/822 (2006.01); G05F 1/46 (2006.01); G06F 1/08 (2006.01); H01L 27/00 (2006.01); H01L 27/04 (2006.01); H03K 5/00 (2006.01); H03K 19/00 (2006.01); H03K 19/0175 (2006.01)
CPC (source: EP US)
G05F 1/466 (2013.01 - EP US)
Designated contracting state (EPC)
DE FR GB IT
DOCDB simple family (publication)
EP 0057351 A2 19820811; EP 0057351 A3 19820901; EP 0057351 B1 19840704; DE 3260302 D1 19840809; JP H0315381 B2 19910228; JP S57140033 A 19820830; US 4383216 A 19830510
DOCDB simple family (application)
EP 82100160 A 19820112; DE 3260302 T 19820112; JP 19869181 A 19811211; US 22941781 A 19810129