EP 0379186 A3 19910306 - MEMORY DATA SYNTHESIZER
Title (en)
MEMORY DATA SYNTHESIZER
Publication
Application
Priority
JP 901389 A 19890118
Abstract (en)
[origin: EP0379186A2] A ROM part (24) of a character ROM (21) stores a plurality of font data. A display data RAM (9) simultaneously supplies a plurality of address signals to the character ROM (21) which is provided with a plurality of address decoders (25, 26). Respective address signals are decoded by the corresponding address decoders (25, 26), so that the font data corresponding to the address signals are read on the common bit lines (BL1 - BL l ). Thus, the font data as read are synthesized on the common bit lines (Bl1 - BL l ) as a logical sum.
IPC 1-7
IPC 8 full level
H04N 5/278 (2006.01); G09G 5/22 (2006.01); G09G 5/24 (2006.01); H04N 5/445 (2011.01)
CPC (source: EP)
G09G 5/222 (2013.01); G09G 5/24 (2013.01)
Citation (search report)
- [Y] EP 0136819 A2 19850410 - HITACHI LTD [JP]
- [A] EP 0206695 A2 19861230 - FUJITSU LTD [JP]
- [AP] WO 8906030 A1 19890629 - NCR CO [US]
- [Y] IBM TECHNICAL DISCLOSURE BULLETIN vol. 24, no. 12, May 1982, pages 6250,6251, Armonk, US; P.A. BEAVEN et al.: "Generation of Characters"
Designated contracting state (EPC)
DE FR GB
DOCDB simple family (publication)
EP 0379186 A2 19900725; EP 0379186 A3 19910306; EP 0379186 B1 19950719; DE 69020913 D1 19950824; DE 69020913 T2 19960418; JP H02189080 A 19900725
DOCDB simple family (application)
EP 90100952 A 19900117; DE 69020913 T 19900117; JP 901389 A 19890118