EP 0403287 B1 19941005 - Method of polishing semiconductor wafer.
Title (en)
Method of polishing semiconductor wafer.
Title (de)
Verfahren zum Polieren von Halbleiterplättchen.
Title (fr)
Procédé de polissage de plaquettes semi-conductrices.
Publication
Application
Priority
JP 15374889 A 19890616
Abstract (en)
[origin: EP0403287A2] A semiconductor wafer (12) is ground or polished to a desired thickness by pressing the wafer against a rotating turntable (13), characterised in that the semiconductor wafer is bonded to a plate (11), and a thickness-regulating member (15) whose surface is more resistant to polishing/grinding than the semiconductor wafer is arranged on the plate. By way of example, the thickness-regulating member comprises a silicon matrix and has a silicon oxide film at the surface.
IPC 1-7
IPC 8 full level
B24B 37/07 (2012.01); H01L 21/304 (2006.01)
CPC (source: EP)
B24B 37/013 (2013.01)
Citation (examination)
- JP S6471663 A 19890316 - HITACHI CABLE
- PATENT ABSTRACTS OF JAPAN vol. 13, no. 244 (M-834)(3592) 07 June 1989 ; & JP-A-1 051 268; & JP-A-64 051 268
Designated contracting state (EPC)
DE FR GB
DOCDB simple family (publication)
EP 0403287 A2 19901219; EP 0403287 A3 19911023; EP 0403287 B1 19941005; DE 69013065 D1 19941110; DE 69013065 T2 19950126; JP H0319336 A 19910128
DOCDB simple family (application)
EP 90306519 A 19900614; DE 69013065 T 19900614; JP 15374889 A 19890616