EP 0420584 A2 19910403 - PLL demodulating circuit in traffic information receiver.
Title (en)
PLL demodulating circuit in traffic information receiver.
Title (de)
PLL-Demodulationsschaltung in einem Verkehrsnachrichtenempfänger.
Title (fr)
Circuit PLL démodulateur dans un récepteur d'informations de trafic.
Publication
Application
Priority
JP 25113589 A 19890927
Abstract (en)
In a traffic information receiver, the total of the locking ranges of a PLL circuit (17 for demodulating an SDK signal and a PLL circuit (10) for demodulating a DK signal is so determined as not to exceed the difference between the maximum frequency of the BK signal and the frequency of the DK signal. Even under an influence by a multi-path phenomenon, such a situation can be avoided that the locking frequency of the PLL circuit ( 10) for DK coincides with the frequency of the BK signal to cause erronous detection of the BK signal.
IPC 1-7
IPC 8 full level
G08G 1/09 (2006.01); H04B 1/16 (2006.01); H04H 1/00 (2006.01); H04L 7/02 (2006.01); H04L 7/033 (2006.01)
CPC (source: EP)
H04H 20/55 (2013.01); G08G 1/091 (2013.01); H04H 20/34 (2013.01); H04H 40/27 (2013.01)
Designated contracting state (EPC)
DE FR GB
DOCDB simple family (publication)
EP 0420584 A2 19910403; EP 0420584 A3 19920805; EP 0420584 B1 19951122; DE 69023729 D1 19960104; JP H03113921 A 19910515; JP H0736532 B2 19950419
DOCDB simple family (application)
EP 90310493 A 19900925; DE 69023729 T 19900925; JP 25113589 A 19890927