EP 0733961 A1 19960925 - Reference current generator in CMOS technology
Title (en)
Reference current generator in CMOS technology
Title (de)
Referenzstromgenerator in CMOS-Technologie
Title (fr)
Générateur de courant de référence en technologie CMOS
Publication
Application
Priority
FR 9503352 A 19950322
Abstract (en)
In the current generator circuit a first current mirror (MP1,MP2) is formed with two circuit branches intended to be connected between two supply terminals (VDD,VSS). Ends of the branches comprise transistors (MP1,MN1;MP2,MN2) of opposite conductivity types connected in series. The second current mirror (MP1,MP3) generates an image (13) of the current (11) flowing in one of the branches. An active component (MN4) forming a variable conductance is mounted in series with the branch and is controlled in such a way that its value varies linearly with the current image (13). This conductance thus carries a current whose strength depends solely on the technological characteristics of the active component.
Abstract (fr)
Dans ce générateur un premier miroir de courant (MP1, MP2) forme deux branches de circuit destinées à être connectées entre des bornes d'alimentation (VDD, VSS). Chacune des branches comporte des transistors (MP1, MN1; MP2, MN2) connectés en série et de types de conductivité opposés. Un second miroir de courant (MP1, MP3) engendre une image (i3) du courant (i1) circulant dans l'une des branches. Un composant actif (MN4) formant une conductance variable est montée en série cette branche et commandée de telle manière que sa valeur varie non linéairement avec l'image de courant (i3). Cette conductance est ainsi parcourue par un courant dont l'intensité dépend uniquement des caractéristiques technologiques du composant actif. <IMAGE>
IPC 1-7
IPC 8 full level
CPC (source: EP US)
G05F 3/247 (2013.01 - EP US); G05F 3/262 (2013.01 - EP US)
Citation (search report)
- [A] US 5124632 A 19920623 - GREAVES CARLOS A [US]
- [A] EP 0454250 A1 19911030 - PHILIPS NV [NL]
- [A] US 5384740 A 19950124 - ETOH JUN [JP], et al
- [A] ERIC A VITTOZ: "Analog VLSI Signal Processing: Why, Where, and How?", ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, vol. 6, no. 1, BOSTON, pages 27 - 44, XP002005004
- [A] ERIC A. VITTOZ: "The design of High-Performance Analog Circuits on Digital CMOS Chips.", IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 20, no. 3, NEW YORK US, pages 657 - 665, XP002005005
- [AD] ERIC A. VITTOZ: "CMOS Analog Integrated Circuits Based on Weak Inversion Operation", IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 12, no. 3, NEW YORK US, pages 224 - 231, XP002005006
Designated contracting state (EPC)
CH DE FR GB LI
DOCDB simple family (publication)
EP 0733961 A1 19960925; EP 0733961 B1 20000705; DE 69609104 D1 20000810; DE 69609104 T2 20010315; FR 2732129 A1 19960927; FR 2732129 B1 19970620; US 5949278 A 19990907
DOCDB simple family (application)
EP 96400595 A 19960321; DE 69609104 T 19960321; FR 9503352 A 19950322; US 62041996 A 19960322