Global Patent Index - EP 0864203 A4

EP 0864203 A4 20010207 - HIGH VOLTAGE LEVEL SHIFTING CMOS BUFFER

Title (en)

HIGH VOLTAGE LEVEL SHIFTING CMOS BUFFER

Title (de)

CMOS-PEGELSCHIEBEPUFFER FÜR HOHE SPANNUNGEN

Title (fr)

TAMPON CMOS DE COMMUTATION DE NIVEAU DE HAUTE TENSION

Publication

EP 0864203 A4 20010207 (EN)

Application

EP 97943473 A 19970925

Priority

  • US 9716922 W 19970925
  • US 72392596 A 19961001

Abstract (en)

[origin: WO9815060A1] A voltage level shifting complementary metal-oxide-silicon (CMOS) buffer (30-47) is arranged and configured to operate in two distinct modes - one of which is high voltage and the other low voltage - depending on the level of the supply voltage (40) to the buffer relative to the operating voltage (VDD) of a device in which the buffer is integrated. In the high voltage mode, in which the supply voltage level exceeds the operating voltage level, the buffer is constrained to perform as a high voltage level shifter. In the low voltage mode, in which the supply voltage level is equal to or less than the operating voltage level, the buffer is constrained to perform as a CMOS logic gate.

IPC 1-7

H03K 19/185; H03K 19/0948; H03K 3/356; H03K 17/10

IPC 8 full level

G11C 16/06 (2006.01); H03K 3/356 (2006.01); H03K 17/10 (2006.01); H03K 19/0185 (2006.01)

CPC (source: EP KR)

H03K 3/356113 (2013.01 - EP KR); H03K 17/102 (2013.01 - EP KR); H03K 19/018521 (2013.01 - KR)

Citation (search report)

Designated contracting state (EPC)

CH DE ES FR GB IT LI NL SE

DOCDB simple family (publication)

WO 9815060 A1 19980409; EP 0864203 A1 19980916; EP 0864203 A4 20010207; JP H11500896 A 19990119; KR 19990071743 A 19990927; TW 357361 B 19990501

DOCDB simple family (application)

US 9716922 W 19970925; EP 97943473 A 19970925; JP 51661698 A 19970925; KR 19980704021 A 19980529; TW 86114170 A 19970930