Global Patent Index - EP 1131799 A1

EP 1131799 A1 20010912 - DEVICE FOR LIMITING FRAUD IN AN INTEGRATED CIRCUIT CARD

Title (en)

DEVICE FOR LIMITING FRAUD IN AN INTEGRATED CIRCUIT CARD

Title (de)

VORRICHTUNG ZUR BETRUGSVERHINDERUNG EINER CHIPKARTE

Title (fr)

DISPOSITIF POUR LA LIMITATION DE FRAUDES DANS UNE CARTE A CIRCUIT INTEGRE

Publication

EP 1131799 A1 20010912 (FR)

Application

EP 99954054 A 19991104

Priority

  • FR 9902690 W 19991104
  • FR 9814409 A 19981117

Abstract (en)

[origin: FR2786006A1] The invention concerns an integrated circuit device containing a storage zone comprising a data storage unit. The invention is characterised in that said data storage unit comprises at least a counter element, at least an indicator element and at least a threshold value, said counter element counting at least the number of events having occurred in the device, and being capable of reaching said threshold value indicating a high maximum number of occurrences of said events, said indicator element being capable of passing from one first state to a second state when said counter element has reached said threshold value. The invention is applicable to smart cards.

IPC 1-7

G07F 7/10

IPC 8 full level

G06K 19/10 (2006.01); G07F 7/10 (2006.01)

CPC (source: EP US)

G06Q 20/341 (2013.01 - EP US); G07F 7/082 (2013.01 - EP US); G07F 7/1008 (2013.01 - EP US); G07F 7/1083 (2013.01 - EP US)

Citation (search report)

See references of WO 0030047A1

Designated contracting state (EPC)

AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE

DOCDB simple family (publication)

FR 2786006 A1 20000519; FR 2786006 B1 20011012; AU 1051300 A 20000605; CN 1154961 C 20040623; CN 1326580 A 20011212; EP 1131799 A1 20010912; JP 2002530758 A 20020917; US 6726108 B1 20040427; WO 0030047 A1 20000525

DOCDB simple family (application)

FR 9814409 A 19981117; AU 1051300 A 19991104; CN 99813415 A 19991104; EP 99954054 A 19991104; FR 9902690 W 19991104; JP 2000582978 A 19991104; US 85619101 A 20010813