EP 1346318 A2 20030924 - BALANCED BINARY COLOR DRIVE METHOD AND DIGITALLY CONTROLLED WAVEFORM DRIVE METHODS FOR GRAPHICAL DISPLAYS AND SYSTEM IMPLEMENTING SAME
Title (en)
BALANCED BINARY COLOR DRIVE METHOD AND DIGITALLY CONTROLLED WAVEFORM DRIVE METHODS FOR GRAPHICAL DISPLAYS AND SYSTEM IMPLEMENTING SAME
Title (de)
SYMMETRISCHES BINÄRFARBENANSTEUERVERFAHREN UND DIGITAL GESTEUERTE SIGNALFORMANSTEUERVERFAHREN FÜR GRAFISCHE ANZEIGEN UND DIESE IMPLEMENTIERENDES SYSTEM
Title (fr)
PROCEDE DE COMMANDE A COULEUR BINAIRE EQUILIBREE ET PROCEDES DE COMMANDE A FORME D'ONDE REGULEE NUMERIQUEMENT POUR DES AFFICHAGES GRAPHIQUES ET SYSTEME METTANT EN OEUVRE DE TELS PROCEDES
Publication
Application
Priority
- US 0144919 W 20011129
- US 72709500 A 20001129
- US 72713200 A 20001129
Abstract (en)
[origin: WO0245016A2] An image generation system is provided. A display matrix is provided and has a plurality of display elements which can include liquid crystal. Each display element includes a pixel. A plurality of display circuits are electrically connected to a display element. A plurality of memory cells are associated with each of the circuits, or form part of the circuit, and a selector continuously electrically connected to more than one of the plurality of memory cells, the selector outputting to the pixel data from one memory cell at a time. Peripheral control circuits preferably control read and write operations to the memory cells. Also provided is a light emitting mechanism, which may be a mechanism provided at each pixel, a light modulating mechanism provided at each pixel, and/or an illumination source for illuminating the pixels. Logic suppresses image flicker utilizing balanced binary color. A method for generating an image is also provided. A display element of a display is switched to zero volts for a first time duration. A first voltage is supplied to an electrode of the display element for a second period of time. A second voltage is supplied to a counterelectrode of the display element for a third period of time such that no net voltage is applied to the display element. An illumination pulse is applied to the pixel for illuminating the display element for a predetermined number of units of duration where the units of duration can be in fractions of milliseconds, etc.
[origin: WO0245016A2] An image generation system is provided. A display matrix (12) is provided and has a plurality of display elements (14) which can include liquid crystal. Each display element (14) includes a pixel (16). A plurality of display circuits (18) are electrically connected to a display element. A plurality of memory cells (20A, 20B) are associated with each of the circuit. A selector (21) is used to select the pixel data from one memory cell at a time.
IPC 1-7
IPC 8 full level
G09G 3/34 (2006.01); G09G 3/36 (2006.01); G09G 5/14 (2006.01); G09G 3/20 (2006.01); G09G 3/32 (2006.01); G09G 5/34 (2006.01)
CPC (source: EP KR)
G09G 3/20 (2013.01 - KR); G09G 3/3406 (2013.01 - EP); G09G 3/3648 (2013.01 - EP); G09G 5/14 (2013.01 - EP); G09G 3/2033 (2013.01 - EP); G09G 3/3208 (2013.01 - EP); G09G 5/346 (2013.01 - EP); G09G 2300/0809 (2013.01 - EP); G09G 2300/0857 (2013.01 - EP); G09G 2310/0235 (2013.01 - EP); G09G 2310/065 (2013.01 - EP); G09G 2320/0247 (2013.01 - EP); G09G 2320/0686 (2013.01 - EP); G09G 2330/021 (2013.01 - EP)
Citation (search report)
See references of WO 0245016A2
Designated contracting state (EPC)
AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR
DOCDB simple family (publication)
WO 0245016 A2 20020606; WO 0245016 A3 20030220; AU 2705102 A 20020611; EP 1346318 A2 20030924; KR 20030061412 A 20030718
DOCDB simple family (application)
US 0144919 W 20011129; AU 2705102 A 20011129; EP 01996011 A 20011129; KR 20037007194 A 20030528