EP 1352328 A1 20031015 - CACHE MEMORY AND ADDRESSING METHOD
Title (en)
CACHE MEMORY AND ADDRESSING METHOD
Title (de)
CACHE-SPEICHER UND VERFAHREN ZUR ADRESSIERUNG
Title (fr)
MEMOIRE CACHE ET PROCEDE D'ADRESSAGE
Publication
Application
Priority
- DE 0104821 W 20011220
- DE 10101552 A 20010115
Abstract (en)
[origin: WO02056184A1] The invention relates to a cache memory whose addresses are divided into a tag, index and offset. Means are provided as hardware for carrying out a reversible univocal transformation between the respective tag part of the address and an encoded tag address. The index field of the address of the cache memory can also be encoded by means of another reversibly univocal mapping which maps the index field onto an encoded index field. A corresponding hardware unit is also provided therefor.
IPC 1-7
IPC 8 full level
G06F 12/0864 (2016.01); G06F 12/14 (2006.01)
CPC (source: EP US)
G06F 12/0864 (2013.01 - EP US); G06F 12/1408 (2013.01 - EP US)
Citation (search report)
See references of WO 02056184A1
Designated contracting state (EPC)
AT BE CH CY DE DK ES FR GB IT LI
DOCDB simple family (publication)
WO 02056184 A1 20020718; CN 1486463 A 20040331; DE 10101552 A1 20020725; EP 1352328 A1 20031015; JP 2004530962 A 20041007; US 2004015644 A1 20040122
DOCDB simple family (application)
DE 0104821 W 20011220; CN 01822021 A 20011220; DE 10101552 A 20010115; EP 01984723 A 20011220; JP 2002556374 A 20011220; US 61997903 A 20030715