Global Patent Index - EP 2257900 A4

EP 2257900 A4 20121017 - OPTIMIZATION OF INTEGRATED CIRCUIT DESIGN AND LIBRARY

Title (en)

OPTIMIZATION OF INTEGRATED CIRCUIT DESIGN AND LIBRARY

Title (de)

OPTIMIERUNG DES ENTWURFS UND DER BIBLIOTHEK INTEGRIERTER SCHALTUNGEN

Title (fr)

OPTIMISATION DE LA CONCEPTION D'UN CIRCUIT INTÉGRÉ ET D'UNE BIBLIOTHÈQUE

Publication

EP 2257900 A4 20121017 (EN)

Application

EP 09709144 A 20090205

Priority

  • US 2009033243 W 20090205
  • US 2622208 P 20080205

Abstract (en)

[origin: WO2009100237A2] A method co-optimizes a design and a library in such a way to choose the best set of cells to implement the design. The method takes into account the idea of limiting the number of new cells while reducing target costs and respecting design constraints. The method chooses a minimum nearly optimum set of cells to optimize a design. This involves the simultaneous optimization of a cell-based design and a cell library used to implement it. The invention can produce only an optimized library for a specific application, when the circuit is disregarded. The method takes into account a set of new cells described as finalized cells or as virtual cells, possibly having different transistor topologies, different sizes, different logic functions, and/or different cell template than the original library.

IPC 8 full level

G06F 17/50 (2006.01); G06F 17/40 (2006.01)

CPC (source: EP)

G06F 30/327 (2020.01); G06F 2119/06 (2020.01); G06F 2119/12 (2020.01)

Citation (search report)

Designated contracting state (EPC)

AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK TR

DOCDB simple family (publication)

WO 2009100237 A2 20090813; WO 2009100237 A3 20091105; CN 101990671 A 20110323; EP 2257900 A2 20101208; EP 2257900 A4 20121017; JP 2011525261 A 20110915; JP 5127935 B2 20130123

DOCDB simple family (application)

US 2009033243 W 20090205; CN 200980112309 A 20090205; EP 09709144 A 20090205; JP 2010546000 A 20090205