EP 2510617 A1 20121017 - LIMITING CIRCUIT
Title (en)
LIMITING CIRCUIT
Title (de)
BEGRENZERSCHALTUNG
Title (fr)
CIRCUIT LIMITEUR
Publication
Application
Priority
- DE 102009057544 A 20091209
- DE 2010001387 W 20101125
Abstract (en)
[origin: WO2011069479A1] The invention relates to a limiting circuit having a signal input (E1) and a signal output (A) for limiting an output signal that is present at the signal output (A) and that can be fed to a further circuit (SCH) connected to the output of the limiting circuit, wherein a voltage connection (E2) for feeding a bias voltage (U) and a transistor (T) are present, wherein the gate connection (G) of the transistor (T) is connected to the voltage connection (E2) by means of a first matching circuit (A1) and to the signal input (E1) by means of a second matching circuit (A2).
IPC 8 full level
H03F 1/52 (2006.01); H03G 11/04 (2006.01); H04B 1/18 (2006.01)
CPC (source: EP US)
H03F 1/523 (2013.01 - EP US); H03G 11/04 (2013.01 - EP US); H03F 2200/211 (2013.01 - EP US); H03F 2200/441 (2013.01 - EP US); H03F 2200/66 (2013.01 - EP US)
Citation (search report)
See references of WO 2011069479A1
Citation (examination)
- US 5301081 A 19940405 - PODELL ALLEN F [US], et al
- EP 1480332 A2 20041124 - SAMSUNG ELECTRONICS CO LTD [KR]
Designated contracting state (EPC)
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
DOCDB simple family (publication)
DE 102009057544 A1 20110616; EP 2510617 A1 20121017; IN 4976DEN2012 A 20150925; JP 2013513978 A 20130422; US 2012281325 A1 20121108; US 9093972 B2 20150728; WO 2011069479 A1 20110616
DOCDB simple family (application)
DE 102009057544 A 20091209; DE 2010001387 W 20101125; EP 10807515 A 20101125; IN 4976DEN2012 A 20120606; JP 2012542359 A 20101125; US 201013514632 A 20101125