Global Patent Index - EP 2641183 A1

EP 2641183 A1 2013-09-25 - METHOD AND CIRCUIT ARRANGEMENT FOR TRANSMITTING DATA BETWEEN PROCESSOR MODULES

Title (en)

METHOD AND CIRCUIT ARRANGEMENT FOR TRANSMITTING DATA BETWEEN PROCESSOR MODULES

Title (de)

VERFAHREN UND SCHALTUNGSANORDNUNG ZUR DATENÜBERTRAGUNG ZWISCHEN PROZESSORBAUSTEINEN

Title (fr)

PROCÉDÉ ET CIRCUIT POUR LA TRANSMISSION DE DONNÉES ENTRE MODULES DE PROCESSEURS

Publication

EP 2641183 A1 (DE)

Application

EP 11741215 A

Priority

  • DE 102010043929 A
  • DE 102011007437 A
  • EP 2011063574 W

Abstract (en)

[origin: WO2012065760A1] The invention relates to a circuit arrangement (5) for forming a digital interface (120, 121, 122, 123) comprising a digital data bus (123), which exchanges data when microprocessor systems are connected, wherein said data exchange can be effected bidirectionally. On transmission of data the circuit arrangement generates as bus master a bus clock speed and operates on receipt of data as a bus slave in accordance with a received clock signal. The circuit arrangement comprises at least one FIFO memory (101) for transmitting data and/or at least one FIFO memory (104) for receiving data.

IPC 8 full level (invention and additional information)

G06F 13/42 (2006.01)

CPC (invention and additional information)

G06F 13/364 (2013.01); G06F 13/4265 (2013.01)

Citation (search report)

See references of WO 2012065760A1

Designated contracting state (EPC)

AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

EPO simple patent family

DE 102011007437 A1 20120516; CN 103210384 A 20130717; CN 103210384 B 20160824; EP 2641183 A1 20130925; KR 20130129388 A 20131128; US 2013262724 A1 20131003; WO 2012065760 A1 20120524

INPADOC legal status


2017-11-22 [18W] WITHDRAWN

- Effective date: 20171011

2015-06-10 [17Q] FIRST EXAMINATION REPORT

- Effective date: 20150508

2014-02-19 [DAX] REQUEST FOR EXTENSION OF THE EUROPEAN PATENT (TO ANY COUNTRY) DELETED

2013-10-16 [RIN1] INVENTOR (CORRECTION)

- Inventor name: WEGENER, BASTIAN

2013-10-16 [RIN1] INVENTOR (CORRECTION)

- Inventor name: HARTMANN, RALF

2013-10-16 [RIN1] INVENTOR (CORRECTION)

- Inventor name: BITSCH, CHRISTIAN

2013-10-16 [RIN1] INVENTOR (CORRECTION)

- Inventor name: KABULEPA, LUKUSA DIDIER

2013-09-25 [17P] REQUEST FOR EXAMINATION FILED

- Effective date: 20130617

2013-09-25 [AK] DESIGNATED CONTRACTING STATES:

- Kind Code of Ref Document: A1

- Designated State(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR