EP 3769593 A1 20210127 - COUPON AND METHOD FOR CHECKING A PRINTED CIRCUIT BOARD
Title (en)
COUPON AND METHOD FOR CHECKING A PRINTED CIRCUIT BOARD
Title (de)
TESTCOUPON UND VERFAHREN ZUR ÜBERPRÜFUNG EINER LEITERPLATTE
Title (fr)
ÉPROUVETTE ET PROCÉDÉ DE VÉRIFICATION D'UNE CARTE DE CIRCUITS IMPRIMÉS
Publication
Application
Priority
- DE 102018204108 A 20180319
- EP 2019056782 W 20190319
Abstract (en)
[origin: WO2019179984A1] The invention relates to a coupon (110) for a panel (100) with at least one printed circuit board (101). The printed circuit board (101) has M layers (121), where M is greater than or equal to 2, said layers being electrically insulated from one another by a respective substrate (122, 123). The coupon (110) comprises M test layers (241) for the corresponding M layers (121) of the printed circuit board (101). Each of the M test layers (241) has an electrically conductive reference surface (212) and a test line (211, 213) which is electrically insulated from the reference surface. The reference surface (212) of one test layer (241) is designed as a reference layer for the test line (212, 213) of a directly adjacent test layer (241).
IPC 8 full level
CPC (source: EP)
H05K 1/0268 (2013.01); H05K 1/0218 (2013.01); H05K 3/0097 (2013.01); H05K 3/4638 (2013.01); H05K 2201/09336 (2013.01)
Citation (search report)
See references of WO 2019179984A1
Designated contracting state (EPC)
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
Designated extension state (EPC)
BA ME
DOCDB simple family (publication)
DE 102018204108 A1 20190919; CN 111869336 A 20201030; EP 3769593 A1 20210127; WO 2019179984 A1 20190926
DOCDB simple family (application)
DE 102018204108 A 20180319; CN 201980020547 A 20190319; EP 19712561 A 20190319; EP 2019056782 W 20190319